Patents by Inventor Stephen Clifford Thilenius

Stephen Clifford Thilenius has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9762231
    Abstract: An electronic circuit and methods of operating the electronic circuit are provided. The electronic circuit includes a pull-up transistor for pulling up an input/output (I/O) node of the output circuit to a first voltage and a first isolation transistor for coupling the pull-up transistor to the I/O node. The electronic circuit also includes a pull-down transistor for pulling down the I/O node to a second voltage and a second isolation transistor for coupling the pull-down transistor to the I/O node. In the electronic circuit, the pull-up and the pull-down transistors are transistors supporting a first drain-to-source voltage and a first gate-to-source voltage, while the first and the second isolation transistors are transistors supporting the first drain-to-source voltage and a second gate-to-source voltage greater than the first gate-to-source voltage.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: September 12, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Alvin Leng Sun Loke, Bo Yu, Stephen Clifford Thilenius, Reza Jalilizeinali, Patrick Isakanian
  • Publication number: 20160285453
    Abstract: In one embodiment, a system comprises a pre-driver circuit and a driver. The pre-driver circuit is powered by a first supply voltage, and configured to output a pre-drive signal. The driver comprises a pull-up NMOS transistor having a drain coupled to a second supply voltage, and a source coupled to an output of the driver, wherein the second supply voltage is lower than the first supply voltage by at least a threshold voltage of the pull-up NMOS transistor. The driver also comprises a drive circuit coupled to a gate of the pull-up NMOS transistor, wherein the drive circuit is configured to receive the pre-drive signal and to drive the gate of the pull-up NMOS transistor with a voltage approximately equal to the first supply voltage to drive the output of the driver to a high state depending on a logic state of the pre-drive signal.
    Type: Application
    Filed: December 2, 2015
    Publication date: September 29, 2016
    Inventors: Stephen Clifford Thilenius, Patrick Isakanian, Alvin Leng Sun Loke, Thomas Clark Bryan, LuVerne Ray Peterson
  • Publication number: 20160269017
    Abstract: An electronic circuit and methods of operating the electronic circuit are provided. The electronic circuit includes a pull-up transistor for pulling up an input/output (I/O) node of the output circuit to a first voltage and a first isolation transistor for coupling the pull-up transistor to the I/O node. The electronic circuit also includes a pull-down transistor for pulling down the I/O node to a second voltage and a second isolation transistor for coupling the pull-down transistor to the I/O node. In the electronic circuit, the pull-up and the pull-down transistors are transistors supporting a first drain-to-source voltage and a first gate-to-source voltage, while the first and the second isolation transistors are transistors supporting the first drain-to-source voltage and a second gate-to-source voltage greater than the first gate-to-source voltage.
    Type: Application
    Filed: July 29, 2015
    Publication date: September 15, 2016
    Inventors: Alvin Leng Sun Loke, Bo Yu, Stephen Clifford Thilenius, Reza Jalilizeinali, Patrick Isakanian