Abstract: A processing system receives a user-generated media recording, and metadata associated with the user-generated feedback, from a first device. The user-generated media recording is a recording of the public end-user captured during a live media broadcast using a public-user interface on the first device. The metadata includes information linking the user-generated media recording to the live media broadcast. The system stores the user-generated media recording and the first metadata in one or more storage devices, and transmits a version of the user-generated media recording and at least a portion of the first metadata to a private-user interface on a second device. The private-user interface is configured to receive input from a private end-user selecting the version of the user-generated media recording for broadcast during the same live media broadcast during which the user-generated media recording was created.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.

Abstract: Novel dry powder compositions comprising and methods relating thereto are provided. The dry powder compositions comprise PDE5 inhibitors, such as vardenafil, or pharmaceutically acceptable salts or esters thereof. The dry powder compositions may optionally include an carrier/excipient. The concentration of active agent may be at least about 2% by weight. Methods of aerosolizing the dry powder compositions and using them to treat various diseases are also disclosed.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.

Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A plurality of dimensions from a tensor is flattened into a single dimension. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. A direct memory access (DMA) engine coupled to the one or more processor clusters is configured. Addresses are generated based on the unique address space descriptors and the common address space descriptor. The plurality of dimensions can be summed to generate a single address. Memory is accessed using two or more of the addresses that were generated. The addresses are used to enable DMA access.

Abstract: Techniques for data manipulation using processor cluster address generation are disclosed. One or more processor clusters capable of executing software-initiated work requests are accessed. A direct memory access (DMA) engine, coupled to the one or more processor clusters, is configured, wherein the DMA engine employs address generation across a plurality of tensor dimensions. A work request address field is parsed, where the address field contains unique address space descriptors for each of the plurality of dimensions, along with a common address space descriptor. DMA addresses are generated based on the unique address space descriptors and the common address space descriptor. Memory using two or more of the DMA addresses that were generated is accessed, where the two or more DMA addresses enable processing within the one or more processor clusters.

Abstract: Techniques for data manipulation using filling logic for tensor calculation are disclosed. A processor and a memory subsystem for data manipulation are obtained. A FIFO is configured between the processor and the memory subsystem, where the FIFO is coupled with the processor. FIFO filling logic is configured between the FIFO and the memory subsystem, wherein the FIFO filling logic is connected to the FIFO and the memory subsystem. The processor consumes an element stream from the FIFO, wherein the element stream flows to the FIFO from the memory subsystem through the FIFO filling logic. The element stream from the FIFO comprises elements of a tensor, and the consuming comprises performing tensor calculations. An address is provided to the FIFO filling logic for accessing data from the memory subsystem using an address generator.

Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.

Abstract: Techniques are disclosed for tensor radix point calculation in a neural network. A first tensor is obtained. A first set of weights is generated for the first tensor. An operation is evaluated to be performed by a layer within a deep neural network on the first tensor using the first set of weights. A set of output radix points is determined for the layer within the deep neural network based on the first tensor and the operation. An output tensor is calculated for the layer within the deep neural network using the set of output radix points, the first tensor, and the first set of weights. The operation is restarted, when the layer reports a hardware overflow, using an updated set of output radix points. The determining is further based on a radix point for the first tensor. The determining is further based on metadata for the first tensor.

Abstract: Techniques are disclosed for tensor manipulation within a neural network and include training the neural network. An input tensor is obtained for manipulation within a deep neural network. The input tensor includes fixed-point numerical representations and tensor metadata and is applied to a layer within the deep neural network. The input tensor has variable radix points associated with the fixed-point values of the input tensor. A weighting tensor including metadata is determined for the input tensor applied to the layer. An output tensor is calculated from the layer within the deep neural network based on the input tensor and the weighting tensor. The output tensor has fixed-point values with a second set of variable radix points associated with the fixed-point values of the output tensor. The output tensor includes tensor metadata. The output tensor is propagated within the deep neural network.

Abstract: Systems and techniques to monitor performance of a single user session of an application installed in a client device are described. The application may transmit a request for data to a first server, and receive a response from the first server, the response including the requested data. The application may transmit, to a second server, (i) a transmit time at which the request is transmitted, and (ii) a receive time at which the response is received. The second server may facilitate displaying, on a computing device, the transmit time and the receive time. A developer may view such display to analyze the performance of the application during a single user session.

Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.

Abstract: In an embodiment, a method of binding a human machine interface to an expression of existing computer code may include analyzing the existing computer code to identify one or more bindable expressions in the existing computer code, and receiving a command to bind a human machine interface with one or more of the identified bindable expressions. The method may further include binding, using a processor, one or more of the bindable expressions with the human machine interface in response to the command. The binding may enable the human machine interface to communicate information within the existing computer code in place of the one or more bound expressions. The bound machine interface may communicate information within the computer code while the computer code is executing.

Abstract: A human-powered watercraft, such as a surfboard, paddleboard, body board, or standup paddleboard, incorporates a central section that is narrower than the bow and stern sections.

Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.

Abstract: The described embodiments present techniques for recovering from syntax errors. These techniques correct potential errors while preserving the shape of the parse tree, and the specific implementation of the techniques can be automatically generated from the grammar. These techniques may operate by looking back at states associated with previously-received tokens to determine pair matching status, when a synchronizing symbol is received. The techniques can respond to the pair matching status determination by potentially adding a synthesized token or by deleting a token that has already been received. The techniques may use a structure referred to herein as a tuple to assist with the evaluation of the pair matching status. Some of the techniques utilize indentation information to evaluate the pair matching status, while other techniques ignore such information. The described embodiments also include a technique for automatically generating the tuples from a set of grammar rules associated with the parser.

Abstract: In an embodiment, a method of binding a human machine interface to an expression of existing computer code may include analyzing the existing computer code to identify one or more bindable expressions in the existing computer code, and receiving a command to bind a human machine interface with one or more of the identified bindable expressions. The method may further include binding, using a processor, one or more of the bindable expressions with the human machine interface in response to the command. The binding may enable the human machine interface to communicate information within the existing computer code in place of the one or more bound expressions. The bound machine interface may communicate information within the computer code while the computer code is executing.

Abstract: In an embodiment, a method of binding a human machine interface to an expression of existing computer code may include analyzing the existing computer code to identify one or more bindable expressions in the existing computer code, and receiving a command to bind a human machine interface with one or more of the identified bindable expressions. The method may further include binding, using a processor, one or more of the bindable expressions with the human machine interface in response to the command. The binding may enable the human machine interface to communicate information within the existing computer code in place of the one or more bound expressions. The bound machine interface may communicate information within the computer code while the computer code is executing.

Abstract: A system and method for automatically generating transfer price documentation is described. In some examples, the system includes a tool that receives information from an enterprise for provided services and intangibles within the enterprise, automatically determines one or more allocations for the provided services and intangibles, and generates reports based on the determined allocations.