Abstract: A method and circuit thereof for detecting uncorrelated lines of chrominance of a composite video signal. A threshold level for determining whether lines of chrominance are correlated is defined. A comb filter is then used to separate the chrominance information from the luminance information of a composite video signal. In one embodiment, readings for three consecutive scan lines of chrominance are taken. If any of the adjacent scan lines contain the same color information or the difference is less than the threshold level, the scan lines are correlated. Otherwise, the adjacent scan lines are uncorrelated. If the lines are uncorrelated, a band pass filter is used to separate the chrominance component from the composite video signal. If the lines are correlated, the separation performed by the comb filter was appropriate and no other action is necessary.

Abstract: A low side, low voltage current sink circuit having improved output impedance to reduce effects of leakage current. A current sink circuit is described having a transistor having its emitter coupled to an emitter degeneration resistor which is coupled to the low side (e.g., ground) of a power supply. The output of the current sink is taken at the collector of the transistor. In one embodiment, the transistor is an NPN transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. In this arrangement, the output impedance (R″o) of the current is sink is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current sink designs.

Abstract: A differential charge pump for providing a low charge pump current. The present invention operates in one embodiment as part of an integrated circuit of a semiconductor chip by providing very small magnitude currents to other on-chip circuitry. Specifically, one embodiment of the present invention utilizes an R-2R resistor ladder circuit having moderate sized resistors to progressively reduce a large magnitude current into a very small magnitude current of accurate size. In this manner, available on-chip circuitry voltage can be used to produce the desired small magnitude of current without utilizing excessively large resistors, which can occupy too much die area. This is advantageous when dealing with specific types of on-chip components and circuitry which require accurate currents having very small magnitudes. For example, it may be desirable to integrate filter components (e.g., capacitors) on-chip together with accompanying phase lock loop (PLL) circuitry.

Abstract: A high side low voltage current source circuit having improved output impedance to reduce effects of leakage current. A current source circuit is described with a transistor having an emitter coupled to an emitter degeneration resistor which is coupled to a power supply voltage. The output of the current source is taken at the collector of the transistor. In one embodiment, the transistor is a PNP transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. The output impedance (R″o) of the current is source is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current source designs.

Abstract: A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a voltage supply. The emitter of a first transistor is coupled to the first resistor; the base is coupled to a bias voltage, and the collector is coupled to a capacitor. The capacitor forms part of the filter of the phase-lock-loop circuit. Current flows from the voltage supply through the first resistor and first transistor into the capacitor. A second transistor has a collector coupled to the capacitor; a base; and an emitter coupled to ground via a second resistor. The second transistor and resistor causes a fixed amount of current to be sinked from the capacitor. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the second transistor is directed to a path provided by a third transistor.

Abstract: A low side, low voltage current sink circuit having improved output impedance to reduce effects of leakage current. A current sink circuit is described having a transistor having its emitter coupled to an emitter degeneration resistor which is coupled to the low side (e.g., ground) of a power supply. The output of the current sink is taken at the collector of the transistor. In one embodiment, the transistor is an NPN transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. In this arrangement, the output impedance (R″o) of the current is sink is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current sink designs.

Abstract: A buffer circuit having a high input impedance. The buffer circuit comprises an input lead, a first stage having a first emitter follower transistor and a first level shifter transistor, a second stage having a second emitter follower transistor and a second level shifter transistor, and an output lead coupled to said second stage. The first emitter follower transistor is coupled to the input lead and coupled to the first level shifter transistor. The first and second stage of the buffer circuit acts as a voltage follower. The second emitter follower transistor is coupled to the second level shifter transistor, while the second emitter follower transistor is coupled to the first emitter follower transistor. The buffer circuit has a high input impedance and very low leakage current. Hence, it is ideal for sampling filter components of a phase lock loop circuit within a high frequency clock generation circuit thereby reducing clock jitter.

Abstract: A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a voltage supply. The emitter of a first transistor is coupled to the first resistor; the collector is coupled to a capacitor which is part of the filter elements of the phase-lock-loop. Current flows from the voltage supply through the first resistor and first transistor into the capacitor. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the first transistor is directed to a path provided by a second transistor. The second transistor has an emitter coupled to the base of the first transistor and a collector coupled to the capacitor. The second transistor is biased such that the Rcb leakage current is directed back into the capacitor.