Patents by Inventor Stephen E. Lehman
Stephen E. Lehman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220267218Abstract: Insulating ceramic panels and methods of forming insulating ceramic panels are disclosed herein. The insulating ceramic panels include a plurality of hollow particles and an oxide binder. The plurality of hollow particles are formed from a hollow particle material that includes a metal oxide. The plurality of hollow particles defines an average equivalent particle diameter of at least 10 micrometers (?m) and at most 500 ?m. In addition, the plurality of hollow particles defines an average wall thickness that is at least 3% and at most 30% of the average equivalent particle diameter. The oxide binder material attaches each hollow particle to at least one other hollow particle and differs from the hollow particle material. The insulating ceramic panels define a particle-enclosed void volume fraction, which is enclosed within the plurality of hollow particles, and an interstitial void volume fraction, which is defined within an interstitial space among the plurality of hollow particles.Type: ApplicationFiled: February 4, 2022Publication date: August 25, 2022Inventors: Stephen E. Lehman, Kayleigh Porter, Tobias A. Schaedler
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Patent number: 11370524Abstract: A mechanically attached thermal protection system (MATPS) includes an insulating tile having a top surface, a bottom surface, and a plurality of access holes that extend through the insulating tile from the top surface to the bottom surface. A plurality of brackets include a first end attached to the insulating tile and a second end including a mounting hole therethrough, the second end being positioned proximate the bottom surface of the insulating tile. A plurality of fasteners are positioned proximate the bottom surface of the insulating tile and at least partially positioned within one of the access holes so as to be accessible from the top surface of the insulating tile through one of the plurality of access holes. A MATPS including a plurality of air channels within the insulating tile and a method for sealing these air channels to those within an adjacent structure is also described herein.Type: GrantFiled: July 2, 2018Date of Patent: June 28, 2022Assignee: THE BOEING COMPANYInventors: George P. Halamandaris, Thomas R. Pinney, Jonathan D. Embler, Adam J. Lang, Keith G. Rackers, Stephen E. Lehman
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Patent number: 10532953Abstract: A precursor material is provided for additive manufacturing of a low-density, high-porosity ceramic part. The precursor material includes a body of refractory fibers and a binder in admixture with the body of refractory fibers. The precursor material further includes a viscosity control additive in admixture with the binder and the body of refractory fibers to provide an overall mixture with a viscosity between about 0.3 centipoise and about 150,000 centipoise.Type: GrantFiled: June 20, 2018Date of Patent: January 14, 2020Assignee: The Boeing CompanyInventors: Randall Schubert, Brennan Yahata, Joanna Kolodziejska, Stephen E. Lehman, Vann Heng
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Publication number: 20180305262Abstract: A precursor material is provided for additive manufacturing of a low-density, high-porosity ceramic part. The precursor material includes a body of refractory fibers and a binder in admixture with the body of refractory fibers. The precursor material further includes a viscosity control additive in admixture with the binder and the body of refractory fibers to provide an overall mixture with a viscosity between about 0.3 centipoise and about 150,000 centipoise.Type: ApplicationFiled: June 20, 2018Publication date: October 25, 2018Applicant: The Boeing CompanyInventors: Randall Schubert, Brennan Yahata, Joanna Kolodziejska, Stephen E. Lehman, Vann Heng
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Publication number: 20180304988Abstract: A mechanically attached thermal protection system (MATPS) includes an insulating tile having a top surface, a bottom surface, and a plurality of access holes that extend through the insulating tile from the top surface to the bottom surface. A plurality of brackets include a first end attached to the insulating tile and a second end including a mounting hole therethrough, the second end being positioned proximate the bottom surface of the insulating tile. A plurality of fasteners are positioned proximate the bottom surface of the insulating tile and at least partially positioned within one of the access holes so as to be accessible from the top surface of the insulating tile through one of the plurality of access holes. A MATPS including a plurality of air channels within the insulating tile and a method for sealing these air channels to those within an adjacent structure is also described herein.Type: ApplicationFiled: July 2, 2018Publication date: October 25, 2018Inventors: George P. Halamandaris, Thomas R. Pinney, Jonathan D. Embler, Adam J. Lang, Keith G. Rackers, Stephen E. Lehman
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Patent number: 10106242Abstract: A mechanically attached thermal protection system (MATPS) includes an insulating tile having a top surface, a bottom surface, and a plurality of access holes that extend through the insulating tile from the top surface to the bottom surface. A plurality of brackets include a first end attached to the insulating tile and a second end including a mounting hole therethrough, the second end being positioned proximate the bottom surface of the insulating tile. A plurality of fasteners are positioned proximate the bottom surface of the insulating tile and at least partially positioned within one of the access holes so as to be accessible from the top surface of the insulating tile through one of the plurality of access holes. A MATPS including a plurality of air channels within the insulating tile and a method for sealing these air channels to those within an adjacent structure is also described herein.Type: GrantFiled: August 12, 2014Date of Patent: October 23, 2018Assignee: THE BOEING COMPANYInventors: George P. Halamandaris, Thomas R. Pinney, Jonathan D. Embler, Adam J. Lang, Keith G. Rackers, Stephen E. Lehman
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Patent number: 10029949Abstract: A precursor material is provided for additive manufacturing of a low-density, high-porosity ceramic part. The precursor material comprises a body of refractory fibers and a binder in admixture with the body of refractory fibers. The precursor material further comprises a viscosity control additive in admixture with the binder and the body of refractory fibers to provide an overall mixture with a viscosity between about 0.3 centipoise and about 150,000 centipoise. The overall mixture can be extruded through a nozzle to manufacture the low-density, high porosity ceramic part. The precursor material is produced by obtaining a refractory fiber slurry, and adding a viscosity control additive to the slurry to provide the slurry with a viscosity that is suitable for extrusion through a nozzle to manufacture a low-density, high-porosity ceramic part.Type: GrantFiled: October 24, 2016Date of Patent: July 24, 2018Assignee: The Boeing CompanyInventors: Randall Schubert, Brennan Yahata, Joanna Kolodziejska, Stephen E. Lehman, Vann Heng
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Publication number: 20180111881Abstract: A precursor material is provided for additive manufacturing of a low-density, high-porosity ceramic part. The precursor material comprises a body of refractory fibers and a binder in admixture with the body of refractory fibers. The precursor material further comprises a viscosity control additive in admixture with the binder and the body of refractory fibers to provide an overall mixture with a viscosity between about 0.3 centipoise and about 150,000 centipoise. The overall mixture can be extruded through a nozzle to manufacture the low-density, high porosity ceramic part. The precursor material is produced by obtaining a refractory fiber slurry, and adding a viscosity control additive to the slurry to provide the slurry with a viscosity that is suitable for extrusion through a nozzle to manufacture a low-density, high-porosity ceramic part.Type: ApplicationFiled: October 24, 2016Publication date: April 26, 2018Inventors: Randall Schubert, Brennan Yahata, Joanna Kolodziejska, Stephen E. Lehman, Vann Heng
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Publication number: 20140148557Abstract: Dendrimer/hyperbranched materials are combined with polyimide to form a low CTE material for use as a dielectric substrate layer or an underfill. In the alternative, ruthenium carbene complexes are used to catalyze ROMP cross-linking reactions in polyimides to produce a class of cross-linkable, thermal and mechanical stable material for use as a dielectric substrate or underfill. In another alternative, dendrimers/hyperbranched materials are synthesized by different methods to produce low viscosity, high Tg, fast curing, mechanically and chemically stable materials for imprinting applications.Type: ApplicationFiled: February 3, 2014Publication date: May 29, 2014Inventors: Stephen E. Lehman, JR., James C. Matayabas, JR., Saikumar Jayaraman
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Patent number: 8643199Abstract: Dendrimer/hyperbranched materials are combined with polyimide to form a low CTE material for use as a dielectric substrate layer or an underfill. In the alternative, ruthenium carbene complexes are used to catalyze ROMP cross-linking reactions in polyimides to produce a class of cross-linkable, thermal and mechanical stable material for use as a dielectric substrate or underfill. In another alternative, dendrimers/hyperbranched materials are synthesized by different methods to produce low viscosity, high Tg, fast curing, mechanically and chemically stable materials for imprinting applications.Type: GrantFiled: January 28, 2009Date of Patent: February 4, 2014Assignee: Intel CorporationInventors: Stephen E. Lehman, Jr., James C. Matayabas, Jr., Saikumar Jayaraman
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Patent number: 8586179Abstract: A high temperature structural insulation layer is disclosed. A micro-truss structure comprises a porous lattice structure, and a protected substructure comprises at least one hole. At least one fiber non-adhesively couples the micro-truss structure to the protected substructure via the at least one fiber passing through one or more spaces within the porous lattice structure.Type: GrantFiled: April 9, 2010Date of Patent: November 19, 2013Assignee: The Boeing CompanyInventors: Alan J. Jacobsen, Stephen E. Lehman, Robert E. Doty
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Patent number: 8436470Abstract: A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni.Type: GrantFiled: November 8, 2010Date of Patent: May 7, 2013Assignee: Intel CorporationInventors: Daewoong Suh, Stephen E. Lehman, Mukul Renavikar
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Publication number: 20110278719Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.Type: ApplicationFiled: July 18, 2011Publication date: November 17, 2011Inventors: Stephen E. LEHMAN, JR., Rahul N. MANEPALLI, Leonel R. ARANA, Wendy CHAN
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Patent number: 8018063Abstract: A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni.Type: GrantFiled: October 30, 2009Date of Patent: September 13, 2011Assignee: Intel CorporationInventors: Daewoong Suh, Stephen E. Lehman, Jr., Mukul Renavikar
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Patent number: 8009442Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.Type: GrantFiled: December 28, 2007Date of Patent: August 30, 2011Assignee: Intel CorporationInventors: Stephen E. Lehman, Jr., Rahul N. Manepalli, Leonel R. Arana, Wendy Chan
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Publication number: 20110051376Abstract: A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni.Type: ApplicationFiled: November 8, 2010Publication date: March 3, 2011Applicant: INTEL, INC.Inventors: Daewoong Suh, Stephen E. Lehman, JR., Mukul Renavikar
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Patent number: 7700476Abstract: A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni.Type: GrantFiled: November 20, 2006Date of Patent: April 20, 2010Assignee: Intel CorporationInventors: Daewoong Suh, Stephen E. Lehman, Jr., Mukul Renavikar
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Publication number: 20100044848Abstract: A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni.Type: ApplicationFiled: October 30, 2009Publication date: February 25, 2010Inventors: Daewoong Suh, Stephen E. Lehman, JR., Mukul Renavikar
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Patent number: 7579046Abstract: Smart curing by coupling a catalyst to one or more surface(s) of one or more microelectronic element(s) is generally described. In this regard, according to one example embodiment, a catalyst is coupled to one or more surface(s) of one or more microelectronic element(s) to promote polymerization of an adhesive brought in contact with the catalyst.Type: GrantFiled: December 30, 2005Date of Patent: August 25, 2009Assignee: Intel CorporationInventors: Stephen E. Lehman, Jr., Vijay S. Wakharkar
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Publication number: 20090168390Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate and a die, and coupling the die to the substrate, wherein a gap remains between the die and the substrate. The method also includes placing an underfill material on the substrate and delivering at least part of the underfill material into the gap. The method also includes controlling the flow of the underfill material in the gap using magnetic force. Other embodiments are described and claimed.Type: ApplicationFiled: December 28, 2007Publication date: July 2, 2009Inventors: Stephen E. LEHMAN, JR., Rahul N. MANEPALLI, Leonel R. ARANA, Wendy CHAN