Patents by Inventor Stephen E. Savas

Stephen E. Savas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020115301
    Abstract: Apparatus and methods for an improved plasma processing. A first power source alternates between high and low power cycles to produce and sustain a plasma, and a second power source alternates between high and low power cycles to accelerate ions toward the substrate being processed. Preferably, the power sources are synchronized such that the second power provides each high power cycle substantially during the time that the first power source provides each low power cycle. Commencement of each high power cycle provided by the second power source may be delayed for a period of time after each high power cycle provided by the first power source terminates. This approach allows electrons to cool off and accumulated charge on surface features of the substrate to dissipate before ions are accelerated toward the substrate for processing.
    Type: Application
    Filed: January 18, 2002
    Publication date: August 22, 2002
    Inventor: Stephen E. Savas
  • Publication number: 20020096258
    Abstract: Inductively-coupled plasma reactors for anisotropic and isotropic etching of a substrate, as well as chemical vapor deposition of a material onto a substrate. The reactor system comprises a processing chamber with a plasma shaping member contained therein. In one embodiment, the plasma shaping member extends from a portion of the top wall of the processing chamber, downward into the chamber, and it is generally positioned above the center of the substrate. The shaping member may be a separate piece of hardware attached to the top wall of the chamber, or it may be an integral part the wall itself. Preferably, the plasma shaping member has a recessed portion in the middle and an extended portion located at a distance outside that of the recessed region. The plasma shaping member may be fabricated from virtually any material since it is at an electrically floating potential during processing of the substrate.
    Type: Application
    Filed: November 28, 2001
    Publication date: July 25, 2002
    Inventors: Stephen E. Savas, John Zajac, Mark J. Kushner, Ronald L. Kinder
  • Patent number: 6395641
    Abstract: Apparatus and method for an improved etch process. A power source alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (≳1011 cm−3) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. A separate power source alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: May 28, 2002
    Assignee: Mattson Techonolgy, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 6379576
    Abstract: Variable mode plasma system and method for processing a semiconductor wafer. The modulation of the plasma potential relative to the semiconductor wafer is varied for different process steps. A capacitive shield may be selectively grounded to vary the level of capacitive coupling and modulation of the plasma. Process pressures, gases and power level may also be modified for different process steps. Plasma properties may easily be tailored to specific layers and materials being processed on the surface of the wafer. Variable mode processes may be adapted for (i) removal of photoresist after high-dose ion implant, (ii) post metal etch polymer removal, (iii) via clean, and (iv) other plasma enhanced processes.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 30, 2002
    Assignee: Mattson Technology, Inc.
    Inventors: Leroy Luo, Rene George, Stephen E. Savas, Craig Ranft, Wolfgang Helle, Robert Guerra
  • Publication number: 20020033233
    Abstract: Disclosed is an inductively-coupled plasma reactor that is useful for anisotropic or isotropic etching of a substrate, or chemical vapor deposition of a material onto a substrate. The reactor has a plasma-generation chamber with a conically-shaped plasma-generating portion and coils that are arranged around the plasma-generating portion in a conical spiral. The chamber and coil may be configured to produce a highly uniform plasma potential across the entire surface of the substrate to promote uniform ion bombardment for ion enhanced processing. In addition, a conical chamber and coil configuration may be used to produce activated neutral species at varying diameters in a chamber volume for non-ion enhanced processing. Such a configuration promotes the uniform diffusion of the activated neutral species across the wafer surface.
    Type: Application
    Filed: June 8, 1999
    Publication date: March 21, 2002
    Inventor: STEPHEN E. SAVAS
  • Patent number: 6355909
    Abstract: An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: March 12, 2002
    Assignees: Sandia Corporation, Mattson Technology Inc.
    Inventors: Stewart K. Griffiths, Robert H. Nilson, Brad S. Mattson, Stephen E. Savas
  • Patent number: 6342691
    Abstract: A semiconductor substrate processing system and method of using a stable heating source with a large thermal mass relative to conventional lamp heating systems. The system dimensions and processing parameters are selected to provide a substantial heat flux to the substrate while reducing the potential of heat loss to the surrounding environment, particularly from the edges of the heat source and substrate. Aspects of the present invention include a dual resistive heater system comprising a base or primary heater, surrounded by a peripheral or edge heater. The impedance of the edge heater may be substantially matched to that of the primary heater such that a single power supply may be used to supply power to both heaters. Both resistive heaters deliver heat to a heated block, and the heaters and heated block are substantially enclosed within an insulated cavity. The walls of the insulated cavity may include multiple layers of insulation, and these layers may be substantially concentrically arranged.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: January 29, 2002
    Assignee: Mattson Technology, Inc.
    Inventors: Kristian E. Johnsgard, Jean-François Daviet, James A. Givens, Stephen E. Savas, Brad S. Mattson, Ashur J. Atanos
  • Publication number: 20020005392
    Abstract: Variable mode plasma system and method for processing a semiconductor wafer. The modulation of the plasma potential relative to the semiconductor wafer is varied for different process steps. A capacitive shield may be selectively grounded to vary the level of capacitive coupling and modulation of the plasma. Process pressures, gases and power level may also be modified for different process steps. Plasma properties may easily be tailored to specific layers and materials being processed on the surface of the wafer. Variable mode processes may be adapted for (i) removal of photoresist after high-dose ion implant, (ii) post metal etch polymer removal, (iii) via clean, and (iv) other plasma enhanced processes.
    Type: Application
    Filed: November 16, 1998
    Publication date: January 17, 2002
    Inventors: LEROY LUO, RENE GEORGE, STEPHEN E. SAVAS, CRAIG RANFT, WOLFGANG HELLE, ROBERT GUERRA
  • Patent number: 6331697
    Abstract: A system and method for thermally processing a substrate. A substrate is heated to a processing temperature at which the substrate is susceptible to plastic deformation or slip. An insulating cover may be removed to initially cool the substrate below such temperature before removal from the system. Gas pressure may also be adjusted to enhance heat transfer during processing and decrease heat transfer prior to removal of the substrate. Susceptors or surfaces for cooling the substrate may also be included in the system. The substrate may be transferred from a heating surface to a cooling surface by moving or rotating the substrate through warm transitional regions to avoid slip.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: December 18, 2001
    Assignee: Mattson Technology Inc.
    Inventor: Stephen E. Savas
  • Publication number: 20010023743
    Abstract: Apparatus and method for an improved etch process. A power source alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (≧1011cm−3) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. A separate power source alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts.
    Type: Application
    Filed: May 16, 2001
    Publication date: September 27, 2001
    Inventor: Stephen E. Savas
  • Publication number: 20010009255
    Abstract: A system and method for thermally processing a substrate. A substrate is heated to a processing temperature at which the substrate is susceptible to plastic deformation or slip. An insulating cover may be removed to initially cool the substrate below such temperature before removal from the system. Gas pressure may also be adjusted to enhance heat transfer during processing and decrease heat transfer prior to removal of the substrate. Susceptors or surfaces for cooling the substrate may also be included in the system. The substrate may be transferred from a heating surface to a cooling surface by moving or rotating the substrate through warm transitional regions to avoid slip.
    Type: Application
    Filed: January 4, 2001
    Publication date: July 26, 2001
    Inventor: Stephen E. Savas
  • Patent number: 6253704
    Abstract: Apparatus and method for an improved etch process. A power source alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (≳1011cm−3) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. A separate power source alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: July 3, 2001
    Assignee: Mattson Technology, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 6236023
    Abstract: A method for in-situ cleaning of a hot wall RTP system. Internal components are heated to high temperatures above 500° C. A halocarbon gas, inert gas and oxidizing gas are flowed through the reactor for a period which may exceed 20 minutes and then purged to remove contaminants.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: May 22, 2001
    Assignee: Mattson Technology, Inc.
    Inventors: Stephen E. Savas, Martin L. Hammond, Jean-François Daviet
  • Patent number: 6198074
    Abstract: A system and method for thermally processing a substrate. A substrate is heated to a processing temperature at which the substrate is susceptible to plastic deformation or slip. An insulating cover may be removed to initially cool the substrate below such temperature before removal from the system. Gas pressure may also be adjusted to enhance heat transfer during processing and decrease heat transfer prior to removal of the substrate. Susceptors or surfaces for cooling the substrate may also be included in the system. The substrate may be transferred from a heating surface to a cooling surface by moving or rotating the substrate through warm transitional regions to avoid slip.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: March 6, 2001
    Assignee: Mattson Technology, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 6169271
    Abstract: A method for controlling wafer temperature in a thermal reactor. A wafer is positioned between two or more surfaces, one or more of which are heated. A control temperature is calculated based on the temperatures of the surfaces. The heat applied to the surface(s) is adjusted in response to the control temperature in order to maintain the wafer temperature within narrowly defined limits.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: January 2, 2001
    Assignee: Mattson Technology, Inc.
    Inventors: Stephen E. Savas, Martin L. Hammond, Robert M{umlaut over (u)}eller, Jean-François Daviet
  • Patent number: 6143129
    Abstract: A plasma reactor and methods for processing semiconductor wafers are described. Gases are introduced into a reactor chamber. An induction coil surrounds the reactor chamber. RF power is applied to the induction coil and is inductively coupled into the reactor chamber causing a plasma to form. A split Faraday shield is interposed between the induction coil and the reactor chamber to substantially block the capacitive coupling of energy into the reactor chamber which may modulate the plasma potential. The configuration of the split Faraday shield may be selected to control the level of modulation of the plasma potential. For etch processes, a separate powered electrode may be used to accelerate ions toward a wafer surface. For isotropic etching processes, charged particles may be filtered from the gas flow, while a neutral activated species passes unimpeded to a wafer surface.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: November 7, 2000
    Assignee: Mattson Technology, Inc.
    Inventors: Stephen E. Savas, Brad S. Mattson, Martin L. Hammond, Steven C. Selbrede
  • Patent number: 6133550
    Abstract: An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: October 17, 2000
    Assignees: Sandia Corporation, Mattson Technology, Inc.
    Inventors: Stewart K. Griffiths, Robert H. Nilson, Brad S. Mattson, Stephen E. Savas
  • Patent number: 5983828
    Abstract: Apparatus and method for an improved etch process. A power source alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (>10.sup.11 cm.sup.-3) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. A separate power source alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts.
    Type: Grant
    Filed: October 8, 1996
    Date of Patent: November 16, 1999
    Assignee: Mattson Technology, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 5964949
    Abstract: Disclosed is an inductively-coupled plasma reactor that is useful for anisotropic or isotropic etching of a substrate, or chemical vapor deposition of a material onto a substrate. The reactor has a plasma-generation chamber with a conically-shaped plasma-generating portion and coils that are arranged around the plasma-generating portion in a conical spiral. The chamber and coil may be configured to produce a highly uniform plasma potential across the entire surface of the substrate to promote uniform ion bombardment for ion enhanced processing. In addition, a conical chamber and coil configuration may be used to produce activated neutral species at varying diameters in a chamber volume for non-ion enhanced processing. Such a configuration promotes the uniform diffusion of the activated neutral species across the wafer surface.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: October 12, 1999
    Assignee: Mattson Technology, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 5811022
    Abstract: A plasma reactor and methods for processing semiconductor wafers are described. Gases are introduced into a reactor chamber. An induction coil surrounds the reactor chamber. RF power is applied to the induction coil and is inductively coupled into the reactor chamber causing a plasma to form. A split Faraday shield is interposed between the induction coil and the reactor chamber to substantially block the capacitive coupling of energy into the reactor chamber which may modulate the plasma potential. The configuration of the split Faraday shield may be selected to control the level of modulation of the plasma potential. For etch processes, a separate powered electrode may be used to accelerate ions toward a wafer surface. For isotropic etching processes, charged particles may be filtered from the gas flow, while a neutral activated species passes unimpeded to a wafer surface.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: September 22, 1998
    Assignee: Mattson Technology, Inc.
    Inventors: Stephen E. Savas, Brad S. Mattson