Abstract: An information handling system includes first and second printed circuit boards (PCBs), and first and second connectors. The first PCB includes a first top surface, a first bottom, and a first plurality of side surfaces extending between the first top and first bottom surfaces. The first connector is embedded within the first PCB, and extends from the first bottom surface toward the first top surface. A first height of the first connector is substantially equal to a first thickness of the first PCB. The second PCB includes a second top surface, a second bottom, and a second plurality of side surfaces extending between the second top and second bottom surfaces. The second connector is embedded within the second PCB, and extends from the second bottom surface toward the second top surface. A second height of the second connector is greater than a second thickness of the second printed circuit board.

Abstract: An information handling system includes first and second printed circuit boards (PCBs), and first and second connectors. The first PCB includes a first top surface, a first bottom, and a first plurality of side surfaces extending between the first top and first bottom surfaces. The first connector is embedded within the first PCB, and extends from the first bottom surface toward the first top surface. A first height of the first connector is substantially equal to a first thickness of the first PCB. The second PCB includes a second top surface, a second bottom, and a second plurality of side surfaces extending between the second top and second bottom surfaces. The second connector is embedded within the second PCB, and extends from the second bottom surface toward the second top surface. A second height of the second connector is greater than a second thickness of the second printed circuit board.

Abstract: Systems and methods are disclosed that may include identifying a first coefficient of thermal expansion for a first component, the first component including component pins having a first pitch value; identifying a second coefficient of thermal expansion for a second component, the second component associated with electrically conductive pads; determining a relative expansion value based on the first coefficient of thermal expansion and the second coefficient of thermal expansion; determining a change in temperature value of the first component and the second component, the change in temperature value indicating a change in temperature caused by a soldering process; and determining a second pitch value for the electrically conductive pads based on a product of the relative expansion value, the first pitch value, and the change in temperature value, the second pitch value causing an alignment between the component pins and the electrically conductive pads during the soldering process.

Abstract: Systems and methods are disclosed that may include identifying a first coefficient of thermal expansion for a first component, the first component including component pins having a first pitch value; identifying a second coefficient of thermal expansion for a second component, the second component associated with electrically conductive pads; determining a relative expansion value based on the first coefficient of thermal expansion and the second coefficient of thermal expansion; determining a change in temperature value of the first component and the second component, the change in temperature value indicating a change in temperature caused by a soldering process; and determining a second pitch value for the electrically conductive pads based on a product of the relative expansion value, the first pitch value, and the change in temperature value, the second pitch value causing an alignment between the component pins and the electrically conductive pads during the soldering process.

Abstract: A mid-plane assembly includes a main circuit board portion including a plurality of electrical connectors configured to releasably engage a plurality of devices, a first circuit board portion, and a first electrical coupling assembly configured to electrically couple the first circuit board portion to the main circuit board portion and position the first circuit board portion essentially orthogonal to the main circuit board portion.

Abstract: A mid-plane assembly includes a main circuit board portion including a plurality of electrical connectors configured to releasably engage a plurality of devices, a first circuit board portion, and a first electrical coupling assembly configured to electrically couple the first circuit board portion to the main circuit board portion and position the first circuit board portion essentially orthogonal to the main circuit board portion.

Abstract: A mid-plane assembly includes a main circuit board portion including a plurality of electrical connectors configured to releasably engage a plurality of devices, a first circuit board portion, and a first electrical coupling assembly configured to electrically couple the first circuit board portion to the main circuit board portion and position the first circuit board portion essentially orthogonal to the main circuit board portion.

Abstract: A storage device mounting system includes a cage assembly configured to receive one or more storage devices. A pivot assembly is configured to pivotally attach the cage assembly to a chassis assembly. A flexible conductor assembly is configured to electrically couple the one or more storage devices to a system board assembly while allowing the cage assembly to pivot with respect to the chassis assembly.

Abstract: An adapter assembly includes an adapter board. A first connector assembly is coupled to the adapter board and is configured to releasably electrically couple the adapter board to a high-availability IT component. A second connector assembly is coupled to the adapter board and is configured to releasably couple the adapter board to a non-hot-swappable industry standard expansion card. The adapter board includes hot swap logic configured to enable the non-hot-swappable industry standard expansion card to function as a hot-swappable industry standard expansion card.

Abstract: An adapter assembly includes an adapter board. A first connector assembly is coupled to the adapter board and is configured to releasably electrically couple the adapter board to a high-availability IT component. A second connector assembly is coupled to the adapter board and is configured to releasably couple the adapter board to an industry standard expansion card. The adapter assembly is configured to be positioned within an enclosure of a hot swappable IT carrier assembly.

Abstract: A storage device mounting system includes a cage assembly configured to receive one or more storage devices. A pivot assembly is configured to pivotally attach the cage assembly to a chassis assembly. A flexible conductor assembly is configured to electrically couple the one or more storage devices to a system board assembly while allowing the cage assembly to pivot with respect to the chassis assembly.

Abstract: A storage device mounting system includes a cage assembly configured to receive one or more storage devices. A pivot assembly is configured to pivotally attach the cage assembly to a chassis assembly. A flexible conductor assembly is configured to electrically couple the one or more storage devices to a system board assembly while allowing the cage assembly to pivot with respect to the chassis assembly.

Abstract: A memory module mounting system includes a bracket assembly configured to engage a system board. The bracket assembly includes: a standoff assembly that is configured to position a memory module a desired distance from the system board, and an alignment pin assembly configured to position the bracket assembly on the system board. A tether assembly is flexibly coupled to the bracket assembly. A screw assembly is held captive by the tether assembly and configured to pass though the bracket assembly and releasably engage the system board.

Abstract: A system board includes at least one microprocessor coupled to the system board. A VR module card includes a voltage regulator circuit, wherein the voltage regulator circuit is configured to provide electrical power to the at least one microprocessor. A circuit board region is configured to receive the VR module card.

Abstract: A system board includes at least one microprocessor coupled to the system board. A first circuit board region is populated with a first model voltage regulator circuit. The first model voltage regulator circuit is configured to provide electrical power to the at least one microprocessor. A second circuit board region is unpopulated and configured to receive a second model voltage regulator circuit.

Abstract: Disclosed are ways of providing a highly flexible high availability storage system. Disk drive carriers for insertion into enclosures in a storage system include several disk drives. The enclosures accept carriers that include drives of different sizes, and drives compatible with different storage technologies, for instance Fibre Channel, SATA, or SAS. Drives oriented in their carriers in a manner that allows them to be connected to a common medium via identical flex circuits that are configured based on the orientation of the drives. Redundant controllers include redundant serial buses for transferring management information to the carriers. The carriers include a controller for monitoring the multiple serial buses and producing storage technology specific management commands for the disk drives.

Abstract: A system having a processor, a printed circuit board, and an adapter board, coupled to the processor through the printed circuit board. The adapter board provides a first signal having a first state when the adapter board is in a proper operating condition and a second state when the adapter board is in an improper condition. The adapter board produces a second signal having the second state for less than a predetermined time when an adapter board requires a reset signal from the processor. The adapter board combines the first signal with the second signal a single signal fed to the processor through the printed circuit board. When the processor detects that the single signal is in the second state for a time less than the predetermined period of time, the process interprets the single signal as indicating the adapter board requires a reset.

Abstract: A data storage system includes a first storage processor for storing and retrieving data from a data storage array for at least one host computer; a second storage processor, coupled to the first storage processor by a communication link, for storing and retrieving data from the data storage array for the at least one host computer; a number M of multiplexers, M being greater than one, each of the multiplexers being coupled to the first storage processor and the second storage processor for receiving data signals from the first storage processor and the second storage processor and transmitting the data signals to a disk drive device; a number A of arbiters, each being coupled to the first storage processor, the second storage processor and a number N of the plurality of multiplexers, for receiving arbiter control signals from the first storage processor and the second storage processor and transmitting multiplexer control signals to each of the number N of the plurality of multiplexers; and a midplane device

Abstract: A data storage system includes a disk drive array including a plurality of disk drives; a first storage processor for controlling the operation of the data storage system; a second storage processor for controlling the operation of the data storage system; a first arbiter for controlling communication of data from the first storage processor and the second storage processor to a first group of disk drives of the disk drive array; and a second arbiter for controlling communication of data from the first storage processor and the second storage processor to a second group of disk drives of the disk drive array. Selected data is redundantly stored on disk drives in the first group of disk drives and the second group of disk drives, such that, upon failure of the first arbiter, the selected data is available to the first storage processor and the second storage processor through the second arbiter.

Abstract: Disk drive spin-up is staggered to reduce peak power requirements. Spin-up of the drives is controlled by selectively delaying voltage inputs to the disk drives. Alternately, spin-up of the drives is controlled by staggering the timing of communications to the disk drives.