Patents by Inventor Stephen Eric Richardson

Stephen Eric Richardson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and device for address translation for compressed instructions
    Patent number: 6779100
    Abstract: A computer system for storing corresponding instruction blocks in a compressed form in a main memory and in an uncompressed form in an instruction cache. The instruction cache line addresses for the uncompressed instruction blocks in the instruction cache have an algebraic correlation to the main memory line addresses for the compressed instruction blocks in the main memory. Preferably, the instruction cache line addresses are proportional to the corresponding main memory line addresses.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: August 17, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul Stanton Keltcher, Stephen Eric Richardson