Abstract: A frequency dither technique is used for reducing spurs due to phase increment errors in a direct digital synthesizer output sinusoid. The spurs for a desired output frequency are calculated and, if the spurs fall within a phase locked loop bandwidth, a pair of phase increment values are used representing a pair of frequencies that average to the desired output frequency and the spurs of which fall outside the phase locked loop bandwidth.

Abstract: A calibration device consisting of a gas cell constructed so one window (16) is a Fabry-Perot etalon. The gas cell absorption lines are used to calibrate the Fabry-Perot etalon characteristics. Thus the device can be used to calibrate an optical instrument over a broad range of frequencies that are generated by the Fabry-Perot etalon with the accuracy determined by the stable gas absorption lines.

Abstract: A frequency dither technique is used for reducing spurs due to phase increment errors in a direct digital synthesizer output sinusoid. The spurs for a desired output frequency are calculated and, if the spurs fall within a phase locked loop bandwidth, a pair of phase increment values are used representing a pair of frequencies that average to the desired output frequency and the spurs of which fall outside the phase locked loop bandwidth.

Abstract: An electrical signal jitter and wander measurement system (30) operates in real time and digitally controls bandwidths over which the measurements are performed. A digital phase-lock loop ("PLL") (34) includes a phase detector (44), low pass filters (48, 56), an analog-to-digital converter ("ADC") (54), a digital signal processor ("DSP") (32), a direct digital synthesizer ("DDS") (38), and a tracking oscillator (39). The phase detector receives an input signal that is compared with a signal derived from the DDS. The phase detector signal contains wander and jitter data that are filtered and digitized by the ADC. The DSP receives the data and performs a proportional integral control function to lock the PLL by digitally controlling the DDS frequency. The DDS generates a clock signal at a precise rate determined by the phase accumulation registers. The tracking oscillator locks to multiples of the DDS frequency to increase the resolution of the phase measurement.

Abstract: A phase measurement apparatus and method for measuring electrical signal jitter and wander operates in real time and digitally controls bandwidths over which the measurements are performed. The apparatus includes a digital phase-lock loop (PLL) for generating phase difference signal data having first and second frequency components above and below the loop bandwidth of the phase locked loop. An analog-to-digital converter digitizes the analog phase difference signal from the phase detector. A digital signal processor (DSP) receives the digital data and performs a loop filter function for generating frequency update values to the DDS for phase locking the PLL to an incoming signal. The DSP performs an integration function on the loop filter function output to generate the second frequency components. The first and second frequency components are combined in a summing circuit and filtered in digitally programmable low and high pass filters for establishing measurement bands for measuring the phase difference.

Abstract: A signal generator has a variable reference oscillator, a variable oscillator and a phase locked loop for generating an output having jitter and wander. The variable reference oscillator generates a reference having a varying phase offset over a first phase modulation frequency interval and a constant output over a second phase modulation frequency interval. The variable oscillator generates a constant output over the first phase modulation frequency interval and a variable output over the second phase modulation frequency interval. The phase locked loop includes a phase detector, a phase summing node and oscillator with the phase detector coupled to receive the outputs of the variable reference oscillator and the oscillator, and phase summing node coupled to receive the outputs of the variable oscillator and the phase detector.

Abstract: A laser diode impulse circuit has a normally forward biased step recovery diode coupled to the output of a current pulse generating circuit. An inductor in parallel with a series combination of a pulse shaping network and a laser diode is coupled to the output of the step recovery diode. When the step recovery diode becomes reverse biased in response to a current pulse from the current pulse generating circuit, energy is stored in the inductor. The stored energy is then transferred from the inductor to the laser diode via the pulse shaping network to produce an optical pulse having a desired shape.

Abstract: An optical waveguide photocathode for converting optical signals to electrical signals has an optical waveguide, a semiconductor covering the end of the optical waveguide, a first transparent electrode disposed between the end of the waveguide and the semiconductor, and a second electrode disposed adjacent to and spaced from the semiconductor. An electric potential is applied between the first electrode and the second electrode. The waveguide, first conductor, and semiconductor are relatively pointed at the end to produce high electric field strength at the semiconductor thereby enabling semiconductors with high work functions to be used. The relatively small area of the semiconductor illuminated by the waveguide reduces the dark current, making the device more sensitive to low level signals. The device may be used in a streak tube or a photomultiplier.

Abstract: An electrical circuit compensates for spatial variations in the light transmittance of the target surface (45) of an electron beam-addressed liquid crystal light valve (10). Such variations in light transmittance, which stem in part from the position dependent angle of incidence of the writing beam electrons and position dependent alignment layer variations arising out of manufacturing process limitations, affect the ability to achieve a monotonic gray scale luminance over the display surface. The compensating circuit adjusts the amount of beam current of the writing electron beam by varying the gain and offset voltage of the video signal, which modulates the writing beam current. This is accomplished by applying the X and Y scan position signals to a correction signal generator (102), which produces gain correction and offset correction signals whose magnitudes vary in response to instantaneous scan position of the writing electron beam on the target surface of a particular light valve.

Abstract: A processing circuit for a digital camera system enables capture of a visual event which falls within some user-defined range. A digital camera converts a target image into a set of digital data signals, each signal representing the brightness level of a pixel in a matrix. A memory stores a mask also comprising a matrix of pixels. As the digital camera scans the target image, each data pixel from the camera is compared to a corresponding pixel in the mask and differences in brightness between the two are counted. When the count reaches some predetermined valve, the current frame of video data is saved for further analysis and/or display.

Abstract: A method and apparatus for measuring the width of pulses in the gigahertz range comprises the steps of splitting an input pulse and delaying one of the pulses prior to their recombination in a directional coupler. The recombined pulse is then measured in a power meter. By varying the delay, maximum and minimum readings from the power meter may be found. The pulse width may then be found as a function of the actual delay, which may be controlled by the user by varying the distance through a waveguide that the delayed pulse must travel.

Abstract: A frame capture circuit for use with a video camera includes an analog-to-digital converter for converting composite video to digital form and a memory for storing sequential frames of digital video. The analog-to-digital converter is connected to the memory through a summer, and the memory has an output connected to a second summer input through a feedback loop. The feedback loop includes a switch controlled by a central processing unit such that when the switch is closed, the output of the memory is a composite video data frame comprising a current plus a previous frame of data. The central processing unit closes the switch whenever an event of interest displayed on an external device falls near the end of a frame of video generated by the camera so that the entire event is captured without regard to the scanning phase of the video camera.

Abstract: A cathode ray tube includes first and second electrostatic quadrupole lens between the electron gun and the vertical deflection plates to properly focus the electron beam before it enters the vertical deflection plates. A third electrostatic quadrupole lens is located between the vertical deflection plates and the horizontal deflection plates to enhance the angle of deflection as well as to aid in the proper focus of the electron beam as it moves from the vertical deflection plates into the horizontal deflection plates thereby providing substantially improved vertical sensitivity and scan expansion of the electron beam while maintaining the beam velocity constant.