Abstract: A clamp circuit for a read-only-memory (ROM) device provides clamp voltages which can uniformly compensate for the parasitic capacitance on ROM word lines and improve the performance of the ROM device. The clamp circuit includes an active load, a plurality of amplifiers and a transmission gate. The amplifiers have various trip voltages and are controlled by different decoding signals for providing various clamp voltages to different word lines in the ROM device. Each amplifier is composed of a NOR gate and a transistor. The amplifier trip voltages can be easily set to desired values when designing NOR gate layout patterns without additional complicated processes being introduced into the fabrication methodology of a semiconductor integrated circuit.

Abstract: A mask ROM device having active bit-line clamp circuits which employ a voltage-to-current converter as the clamp circuit for selectively coupling a main bit line of the ROM memory device to a selected one of virtual ground lines. The voltage-to-current converter is selectively coupled between the main bit line and a first or second virtual ground line for clamping therebetween. The voltage-to-current converter converts the voltage difference between the coupled main bit line and the selected first or second virtual ground line into a corresponding current in proportion to a voltage difference, the converted current being coupled to the selected first or second virtual ground line.