Abstract: A reinforcement means for molded and extruded articles such as tires has a metal structure with a layer of silica gel bonded thereto. The silica gel bonds the reinforcement means to the rubber compound during the molding/vulcanization of the rubber compound without the need for a slow curing stage. The silica gel may be applied to the metal structure by a sol-gel process with the gel formed by drying the sol at a temperature up to 150° C. The reinforcement means is preferably a cable formed from steel wires coated with the silica gel. To further improve bonding of the silica gel to the rubber compound, an organosilane bonding agent may be included in the rubber compound or the reinforcing means provided with a second layer comprising an organosilane as a bonding agent. The reinforcement means are particularly useful for strengthening and providing geometric stability to tires.

Abstract: A method for implementing a geometric array in a computing environment is disclosed. In one embodiment, such a method includes providing an array of slots, where each slot is configured to store a pointer. Each pointer in the array points to a block of elements. Each pointer with the exception of the first pointer in the array points to a block of elements that is twice as large as the block of elements associated with the preceding pointer. Such a structure allows the geometric array to grow by simply adding a pointer to the array that points to a new block of elements that is twice as large as the block of elements associated with the preceding pointer in the array. A corresponding computer program product, as well as a method for accessing data in the geometric array, are also disclosed.

Abstract: A computer implemented method, a computer program product and a data processing system for executing an application written in a dynamic language are provided. An execution point of the application is loaded. A list of classes associated with the execution point is generated. The loading of each class in the list of classes is simulated. New execution points and new classes accessible from each execution point within each class in the list of classes are identified by recursively parsing instructions associated with each execution point. The list is modified to include the identified new execution points and new classes. Responsive to a determination that new execution points and new classes have been identified, the steps of identifying new execution points and new classes and modifying the list is repeated. The list is saved.

Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.

Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.

Abstract: A method for implementing a hash map to improve performance consistency is disclosed herein. In one embodiment, such a method includes providing a hash map comprising a set of tables, the set of tables initially containing a first table. When the first table is full, the method augments the hash map by adding a second table to the set of tables. Similarly, when the second table is full, the method augments the hash map by adding a third table to the set of tables. A similar technique may be used to add additional tables to the hash map. When searching for a value in any of the tables in the hash map, the method uses the same hash code. A corresponding computer program product and apparatus are also disclosed herein.

Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.

Abstract: There is provided a computer implemented method for determining the efficiency of a runtime compiler. A set of execution times representing the time taken for program code to perform a set task after two or more runtime compilations is recorded. A first metric as the difference between the first execution time and the last execution time of the set of execution times, a second metric as the average throughput improvement from the set of execution times, and a third metric as the time taken for the compiler to achieve the maximum throughput from the set of execution times is calculated. Finally, an efficiency metric is calculated using the first, second and third metrics to determine the efficiency of the compiler.

Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.

Abstract: A computer implemented method, apparatus, and computer program product for copy-on-write optimization of immutable objects. An immutable object is marked as read-only to form a read-only object. The read-only object is formed to delay copying of the immutable object until a runtime determination is made that a write to the immutable object will be made. In response to an attempt to write to the read-only object, an internal value of the read-only object is copied to read-and-write storage using runtime information to form a writable copy of the read-only object. A set of references for the read-only object is updated to point to the writable copy of the read-only object. Delaying copying of the immutable object optimizes a copy-on-write of the immutable object.

Abstract: A reinforcement means for moulded and extruded articles such as tires has a metal structure with a layer of silica gel bonded thereto. The silica gel bonds the reinforcement means to the rubber compound during the moulding/vulcanisation of the rubber compound without the need for a slow curing stage. The silica gel may be applied to the metal structure by a sol-gel process with the gel formed by drying the sol at a temperature up to 150° C. The reinforcement means is preferably a cable formed from steel wires coated with the silica gel. To further improve bonding of the silica gel to the rubber compound, an organosilane bonding agent may be included in the rubber compound or the reinforcing means provided with a second layer comprising an organosilane as a bonding agent. The reinforcement means are particularly useful for strengthening and providing geometric stability to tires.

Abstract: A method, computer program product, and data processing system for substituting a candidate instruction in application code being loaded during load time. Responsive to identifying the candidate instruction, a determination is made whether a hardware facility of the data processing system is present to execute the candidate instruction. If the hardware facility is absent from the data processing system, the candidate instruction is substituted with a second set of instructions.

Abstract: A method, computer program product, and data processing system for substituting a candidate instruction in application code being loaded during load time. Responsive to identifying the candidate instruction, a determination is made whether a hardware facility of the data processing system is present to execute the candidate instruction. If the hardware facility is absent from the data processing system, the candidate instruction is substituted with a second set of instructions.

Abstract: A computer implemented method, apparatus, and computer usable program product for system management. The process schedules a set of application tasks to form a schedule of tasks in response to receiving the set of application tasks from a registration module. The process then performs a feasibility analysis on the schedule of tasks to identify periods of decreased system activity. Thereafter, the process schedules a set of system management tasks during the periods of decreased system activity to form a prioritized schedule of tasks.

Abstract: The number of CPU cycles required to reclaim object memory space in a memory management process is reduced by using a two phase approach. A data structure exists for each object that is to be loaded into object memory space. One part of the data structure is the object definition. The other part is a MM (Memory Management) immunity annotation or value that controls the frequency with which the object must actually be examined to determine if it is suitable for reclamation. On each iteration of the memory management process, the object's MM immunity value is tested to determine whether it is greater than a predetermined threshold. If greater than the threshold, the value is decremented, but the object is not actually examined for its suitability for removal. If the value equals the threshold, the object itself is examined.

Abstract: There is provided a computer implemented method for determining the efficiency of a runtime compiler. A set of execution times representing the time taken for program code to perform a set task after two or more runtime compilations is recorded. A first metric as the difference between the first execution time and the last execution time of the set of execution times, a second metric as the average throughput improvement from the set of execution times, and a third metric as the time taken for the compiler to achieve the maximum throughput from the set of execution times is calculated. Finally, an efficiency metric is calculated using the first, second and third metrics to determine the efficiency of the compiler.

Abstract: A method, computer program product, and data processing system for substituting a candidate instruction in application code being loaded during load time. Responsive to identifying the candidate instruction, a determination is made whether a hardware facility of the data processing system is present to execute the candidate instruction. If the hardware facility is absent from the data processing system, the candidate instruction is substituted with a second set of instructions.

Abstract: A system and method for reorganizing source code using frequency based instruction loop replication are provided. Code is reorganized based on the frequency of execution of blocks of the code so as to favor frequently executed blocks of code over rarely executed code with regard to subsequent optimizations. Frequently executed blocks of instructions are maintained within loop/switch statements and rarely executed blocks of instructions are removed from the loop/switch statements. The rarely executed blocks of instructions may be replicated after the loop/switch statement with a reference back to the loop/switch statement. In this way, when subsequent loop/switch statement optimizations are applied, the frequently executed blocks of instructions within the loop are more likely to benefit from such optimizations since the negative influence of the rarely executed blocks of instructions has been removed.

Abstract: A computer implemented method, apparatus, and computer usable program product for system management. The process schedules a set of application tasks to form a schedule of tasks in response to receiving the set of application tasks from a registration module. The process then performs a feasibility analysis on the schedule of tasks to identify periods of decreased system activity. Thereafter, the process schedules a set of system management tasks during the periods of decreased system activity to form a prioritized schedule of tasks.

Abstract: A method, computer program product, and data processing system for substituting a candidate instruction in application code being loaded during load time. Responsive to identifying the candidate instruction, a determination is made whether a hardware facility of the data processing system is present to execute the candidate instruction. If the hardware facility is absent from the data processing system, the candidate instruction is substituted with a second set of instructions.