Patents by Inventor Stephen Golding

Stephen Golding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12285515
    Abstract: A core shell microcapsule having a liquid core and an outer shell, in which the liquid core comprises solvent and a piroctone compound and the shell comprises polyurea comprising amino sulphonic acid.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: April 29, 2025
    Assignee: Conopco, Inc.
    Inventors: Christopher Fidge, Stephen Golding, Stefan Antonius Franciscus Bon, Samuel Richard Wilson-Whitford, James Merrington
  • Publication number: 20240354256
    Abstract: A Controller Memory Buffer (CMB) caching mechanism can be used for increased CMB performance. Rather than reading data and writing data from the static random access memory (SRAM), data is read from the SRAM. When data is read from the CMB in SRAM there is increase performance, but little space to process both read and write commands. Using a dynamic random access memory (DRAM) for write commands and CMB in SRAM for read commands allows for increased performance. Due to limited space in the SRAM, when the read commands are read from the host, the commands are deleted. This allows for relevant data stored in the SRAM to be used for the next command, but then deleted for the next command to be processed. The increase in performance is allowed, while not using extra SRAM or DRAM.
    Type: Application
    Filed: July 26, 2023
    Publication date: October 24, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Stephen GOLD, Judah Gamliel HAHN, Shay BENISTY
  • Publication number: 20240220138
    Abstract: The present disclosure generally relates to creating and recalibrating zone groups. Rather than having a fixed zone group size, the zone group size can be dynamic where the data storage device provides a range of zone group sizes to a host device. Based upon block availability and host device commands, new zone groups may be formed of different sizes within the provided range. If there is an insufficient number of blocks available to create a zone group with a size within the provided range, the data storage device can recalibrate. The insufficient number of blocks may be due to bad blocks and/or fragmentation. To obtain more blocks, garbage collection can occur and/or the data storage device can request the host device to release some blocks. The dynamic zone group creation and recalibration ensures more efficient operation of the data storage device.
    Type: Application
    Filed: July 18, 2023
    Publication date: July 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Karin INBAR, Liam PARKER, Stephen GOLD
  • Publication number: 20240220359
    Abstract: The present disclosure generally relates to achieving an acceptable uncorrectable bit error rate (UBER) using a dual temporary data protecting approach and a small SLC cache by adding a temporary XOR protection to zone-groups rather than storing another copy of the zone within the drive. The parity data can be stored with the user data (e.g., as part of the zone-group, effectively increasing zone-group size by 1) or in a separate location, e.g., in an SLC block or another separate MLC block.
    Type: Application
    Filed: July 18, 2023
    Publication date: July 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Karin INBAR, Stephen GOLD, Liam PARKER
  • Publication number: 20230346668
    Abstract: A hair treatment composition comprising: i) a cleansing phase comprising a surfactant, in which at least 50 wt % of the total surfactant comprises an ethoxylated alkyl sulphate anionic surfactant; ii) an oil-in-water emulsion comprising a silicone; iii) a piroctone compound at a level of 0.15 to 1.5 wt % of the composition; and iv) a cationic polymer in which the cationic polymer comprises a dimethyl diallyl ammonium moiety, at a level of 0.1 to 1.0 wt % of the composition; wherein the anti-dandruff agent component in the composition is less than 50 wt % in solid form.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 2, 2023
    Inventors: Nicholas John Ainger, Luisa Zoe Collins, Stephen Golding, Louise Jannette Roberts
  • Patent number: 11714750
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: August 1, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel Helmick, Richard S. Lucky, Stephen Gold, Ryan R. Jones
  • Patent number: 11550658
    Abstract: A storage system caches logical-to-physical address table entries read in volatile memory. The logical-to-physical address table entries are stored in codewords. The storage system can vary a number or size of an entry in a codeword. Additionally or alternatively, each codeword can store both complete and partial logical-to-physical address table entries. In one example, a codeword having 62 bytes of data and two bytes of error correction code stores 15 complete logical-to-physical address table entries and one partial logical-to-physical address table entry, where the remainder of the partial entry is stored in another codeword. This configuration strikes a good balance between storage space efficiency and random-access write performance.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: January 10, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: James J. Walsh, Stephen Gold, David R. Meyer, Vivek Shivhare
  • Patent number: 11429485
    Abstract: Memories using end-to-end data protection using physical location checks are described. In one aspect, a storage device includes non-volatile memory and a controller coupled to the memory. The controller may receive a write instruction including a data word and a logical address, include metadata with the word including error correction data, identify a physical address in a mapping table based on the logical address, generate a tag corresponding to the physical address, and replace the error correction data with the generated tag or a value based thereon before writing the data word to memory. In one embodiment, the controller may generate the tag concurrently with performing a logical error check using the error correction data.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: August 30, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Atif Hussain, Robert Ellis, Vivek Shivhare, Stephen Gold
  • Publication number: 20220114094
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 14, 2022
    Inventors: Daniel HELMICK, Richard S. LUCKY, Stephen GOLD, Ryan R. JONES
  • Patent number: 11237959
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: February 1, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel Helmick, Richard S. Lucky, Stephen Gold, Ryan R. Jones
  • Patent number: 10918107
    Abstract: A method of measuring a wet friction of a bundle of hair, using a system which includes a friction probe having a contact surface and fitted with a weight in the range of from 10 g to 500 g, inclusive, a means for securing the bundle of hair, and a water bath, the friction probe being connected to a texture analyser, the method including the step of i) providing a bundle of hair fibres. The method also includes the steps of ii) aligning the bundle of hair fibres; iii) securing the bundle of hair fibres; iv) immersing the bundle of hair fibres under water in the water bath; v) contacting the bundle of hair fibres with the contact surface of the friction probe, which is fitted with the weight; vi) moving the probe along the hair fibres; and vii) recording the friction generated under step vi).
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: February 16, 2021
    Assignee: Conopco, Inc.
    Inventors: Christopher Fidge, Stephen Golding, Paul Damien Price, David William Thornthwaite
  • Patent number: 10884917
    Abstract: The present disclosure generally relates to data storage devices comprising one or more memory packages. At least one memory package of the storage device comprises a first stack of memory dies coupled together by a first chip select line and a second stack of memory dies coupled together by a second chip select line. Both the first stack and the second stack comprise a plurality of non-volatile memory dies and a dissimilar memory die disposed on top of the plurality of non-volatile memory dies. Within both the first stack and the second stack, the plurality of non-volatile memory dies is a different type of memory than the dissimilar memory die. Additionally, within both the first stack and the second stack, the plurality of non-volatile memory dies is configured to store host data, and the dissimilar memory die is configured to store cached data.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: January 5, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC
    Inventors: Robert W. Ellis, Stephen Gold
  • Patent number: 10878111
    Abstract: Example storage systems, storage devices, and methods provide secure transfer of data between peer storage devices using protection information. Data operation commands may be received that use a protection information data block format for transferring a target data block between peer storage devices. A local data operation may operate on the target data block in a first storage device and compare at least one protection information tag value to a first data check value. At least one destination verification protection information tag value and the target data block may be transferred to a second storage device through a peer communication channel. The destination verification protection information tag value may be compared to a destination data block protection information tag value by the second storage device. The second storage device may then execute a data operation on the target data block.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: December 29, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Stephen Gold, Adam Roberts, Sanjay Subbarao
  • Publication number: 20200183825
    Abstract: The present disclosure generally relates to data storage devices comprising one or more memory packages. At least one memory package of the storage device comprises a first stack of memory dies coupled together by a first chip select line and a second stack of memory dies coupled together by a second chip select line. Both the first stack and the second stack comprise a plurality of non-volatile memory dies and a dissimilar memory die disposed on top of the plurality of non-volatile memory dies. Within both the first stack and the second stack, the plurality of non-volatile memory dies is a different type of memory than the dissimilar memory die. Additionally, within both the first stack and the second stack, the plurality of non-volatile memory dies is configured to store host data, and the dissimilar memory die is configured to store cached data.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 11, 2020
    Inventors: Robert W. ELLIS, Stephen GOLD
  • Publication number: 20200128826
    Abstract: A method of measuring a wet friction of a bundle of hair, using a system which includes a friction probe having a contact surface and fitted with a weight in the range of from 10 g to 500 g, inclusive, a means for securing the bundle of hair, and a water bath, the friction probe being connected to a texture analyser, the method including the step of i) providing a bundle of hair fibres. The method also includes the steps of ii) aligning the bundle of hair fibres; iii) securing the bundle of hair fibres; iv) immersing the bundle of hair fibres under water in the water bath; v) contacting the bundle of hair fibres with the contact surface of the friction probe, which is fitted with the weight; vi) moving the probe along the hair fibres; and vii) recording the friction generated under step vi).
    Type: Application
    Filed: December 30, 2019
    Publication date: April 30, 2020
    Inventors: Christopher Fidge, Stephen Golding, Paul Damien Price, David William Thomthwaite
  • Publication number: 20200117595
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Application
    Filed: December 11, 2019
    Publication date: April 16, 2020
    Inventors: Daniel HELMICK, Richard S. LUCKY, Stephen GOLD, Ryan R. JONES
  • Publication number: 20200042725
    Abstract: Example storage systems, storage devices, and methods provide secure transfer of data between peer storage devices using protection information. Data operation commands may be received that use a protection information data block format for transferring a target data block between peer storage devices. A local data operation may operate on the target data block in a first storage device and compare at least one protection information tag value to a first data check value. At least one destination verification protection information tag value and the target data block may be transferred to a second storage device through a peer communication channel. The destination verification protection information tag value may be compared to a destination data block protection information tag value by the second storage device. The second storage device may then execute a data operation on the target data block.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 6, 2020
    Inventors: Vladislav Bolkhovitin, Stephen Gold, Adam Roberts, Sanjay Subbarao
  • Patent number: 10521343
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: December 31, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Daniel Helmick, Richard S. Lucky, Stephen Gold, Ryan R. Jones
  • Publication number: 20180357165
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Application
    Filed: June 20, 2017
    Publication date: December 13, 2018
    Applicant: Western Digital Technologies, Inc.
    Inventors: Daniel Helmick, Richard S. Lucky, Stephen Gold, Ryan R. Jones
  • Patent number: 9880906
    Abstract: Embodiments include methods, apparatus, and systems for managing resources in a physical storage library behind a virtual storage library. In one embodiment, priorities are assigned to copy applications and rules determine which when applications are assigned to resources in the physical storage library.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: January 30, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Stephen Gold, Shannon Moyes Clark