Abstract: A method for controlling operation of a lighting system is provided. The method includes operating the lighting system in a first mode during a time period to provide a first light output. The first output can be a blend of HINS light and non-HINS light. The method includes determining a dosage amount of HINS light provided during the time period. Furthermore, the method includes operating the lighting system in a second mode to provide a second lighting output. The second light output can be HINS light or a blend of HINS light and non-HINS light. Furthermore, spectral energy associated with HINS light in the second light output is greater than spectral energy associated with the HINS light in the first light output.

Abstract: Multi-function lighting fixtures are provided. In one example implementation, a lighting fixture may include an optical housing extending lengthwise between a first end and a second end. The optical housing may include a plurality of light sources disposed within an interior of the optical housing and a plurality of optical elements disposed along an exterior of the optical housing. The optical housing may also a plurality of sections defined within the interior of the optical housing. Each of the optical sections may be associated with a separate light source of the plurality of light sources and a separate optical element of the plurality of optical elements.

Abstract: A wall-wash lighting fixture is provided. The wall-wash lighting fixture includes a solid-state light source having a light emitting surface configured to emit light. The light emitting surface is a long dimension of the light emitting surface. The wall-wash lighting fixture further includes a frustoconical structure. The solid-state light source is positioned to emit light into the frustoconical structure. The wall-wash lighting fixture includes a reflector coupled to the frustoconical structure such that light exiting frustoconical structure is reflected at a non-parallel angle relative to a vertical axis associated with the wall-wash lighting fixture. The reflector defines an opening.

Abstract: Multi-function lighting fixtures are provided. In one example implementation, a lighting fixture may include an optical housing extending lengthwise between a first end and a second end. The optical housing may include a plurality of light sources disposed within an interior of the optical housing and a plurality of optical elements disposed along an exterior of the optical housing. The optical housing may also a plurality of sections defined within the interior of the optical housing. Each of the optical sections may be associated with a separate light source of the plurality of light sources and a separate optical element of the plurality of optical elements.

Abstract: Multi-function lighting fixtures are provided. In one example implementation, a lighting fixture may include an optical housing extending lengthwise between a first end and a second end. The optical housing may include a plurality of light sources disposed within an interior of the optical housing and a plurality of optical elements disposed along an exterior of the optical housing. The optical housing may also a plurality of compartments defined within the interior of the optical housing. Each of the optical compartments may be associated with a separate light source of the plurality of light sources and a separate optical element of the plurality of optical elements.

Abstract: A wall-wash lighting fixture is provided. The wall-wash lighting fixture includes a solid-state light source having a light emitting surface configured to emit light. The light emitting surface is a long dimension of the light emitting surface. The wall-wash lighting fixture further includes a frustoconical structure. The solid-state light source is positioned to emit light into the frustoconical structure. The wall-wash lighting fixture includes a reflector coupled to the frustoconical structure such that light exiting frustoconical structure is reflected at a non-parallel angle relative to a vertical axis associated with the wall-wash lighting fixture. The reflector defines an opening.

Abstract: A method for controlling operation of a lighting system is provided. The method includes operating the lighting system in a first mode during a time period to provide a first light output. The first output can be a blend of HINS light and non-HINS light. The method includes determining a dosage amount of HINS light provided during the time period. Furthermore, the method includes operating the lighting system in a second mode to provide a second lighting output. The second light output can be HINS light or a blend of HINS light and non-HINS light. Furthermore, spectral energy associated with HINS light in the second light output is greater than spectral energy associated with the HINS light in the first light output.

Abstract: Multi-function lighting fixtures are provided. In one example implementation, a lighting fixture may include an optical housing extending lengthwise between a first end and a second end. The optical housing may include a plurality of light sources disposed within an interior of the optical housing and a plurality of optical elements disposed along an exterior of the optical housing. The optical housing may also a plurality of compartments defined within the interior of the optical housing. Each of the optical compartments may be associated with a separate light source of the plurality of light sources and a separate optical element of the plurality of optical elements.

Abstract: In one embodiment, a cache element allocation method is provided. Each cache element on a CPU is assigned a quality rank based on the error rate of the cache element. If an allocated cache element is deemed to be faulty, the quality rank of the faulty allocated cache element is compared with the quality rank of the non-allocated cache elements. If a non-allocated cache element has a lower quality rank than the allocated cache element, the non-allocated cache element is swapped in for the allocated cache element.

Abstract: In one embodiment, a CPU cache management system is provided. The CPU management system includes, for example, a CPU chip and cache management logic. The CPU chip include cache elements that are initially in use and spare cache elements that not initially in use. The cache management logic determines whether currently-used cache elements are faulty. If a cache element is determined to be faulty, the cache management logic schedules a reboot of the computer and swaps in a spare cache element for the faulty currently-used cache element during the reboot.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.

Abstract: Systems and methods for conducting processor health-checks are provided. In one embodiment, a method for evaluating the status of a processor is provided. The method includes, for example, initializing and executing an operating system, de-allocating the processor from the available pool or system resources and performing a health-check on the processor while the operating system is executing.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.

Abstract: In one embodiment, a method for repairing a faulty cache element is provided. Once a monitored cache element is determined to be faulty, the system stores the repair information, and cache configuration in an EEPROM or non-volatile memory on the CPU module. Then the computer is rebooted. During the reboot, the faulty cache element is repaired by being swapped out for a spare cache element based on the information stored in the EEPROM or the non-volatile memory.

Abstract: Systems and methods for conducting processor health-checks are provided. In one embodiment, a method for evaluating the status of a processor is provided. The method includes, for example, initializing and executing an operating system, de-allocating the processor from the available pool or system resources and performing a health-check on the processor while the operating system is executing.

Abstract: In one embodiment, a cache element allocation method is provided. Each cache element on a CPU is assigned a quality rank based on the error rate of the cache element. If an allocated cache element is deemed to be faulty, the quality rank of the faulty allocated cache element is compared with the quality rank of the non-allocated cache elements. If a non-allocated cache element has a lower quality rank than the allocated cache element, the non-allocated cache element is swapped in for the allocated cache element.

Abstract: In one embodiment, a CPU cache management system is provided. The CPU management system includes, for example, a CPU chip and cache management logic. The CPU chip include cache elements that are initially in use and spare cache elements that not initially in use. The cache management logic determines whether currently-used cache elements are faulty. If a cache element is determined to be faulty, the cache management logic schedules a reboot of the computer and swaps in a spare cache element for the faulty currently-used cache element during the reboot.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.