Abstract: Multiple measurements may be obtained via a single pin of an integrated circuit (IC) to set multiple control parameters of a light emitting diode (LED) controller within the IC. For example, a first input signal may be applied from the IC to two or more components via a single IC pin. A first output signal may be obtained from the two or more components via the single IC pin. A second input signal may be applied from the IC to the two or more components via the single IC pin, and a second output signal may be obtained from the two or more components via the single IC pin. A first parameter and a second parameter of the two or more components may be calculated based, at least in part, on the first output signal and the second output signal obtained via the single IC pin.

Abstract: A phase lock loop is provided for recovering timing information from a received data signal in a 100Base-TX receiver. The phase lock loop includes a phase encoder (803) for generating a reference phase error. An output phase value on a bus (809) is subtracted from the reference phase value on line (805) with a subtraction block (813) to generate a phase error. This phase error is averaged and decimated over a predetermined number of potential symbol transitions in the received signal. The output phase error is provided from a block (815) on a line (817) to a loop filter. This output is provided only once for each decimation operation such that the loop filter can operate at a lower clock rate. The phase error output is then utilized to select one of multiple clocks that correspond to the phase error, these being incremental phase clocks referenced to a master clock. This utilizes a clock multiplexer (1427) to select one of the multiple clock inputs which are delayed in phase off of the master clock.

Abstract: A multi-path unity gain buffer circuit and method are implemented in a slew amplifier. The multi-path unity buffer has a high frequency signal path and a low frequency signal path. The high frequency signal path has a differential amplifier powered for providing a high frequency, low accuracy buffering operation. The low frequency signal path is coupled to the high frequency signal path. The low frequency signal path has an operational amplifier powered to provide a low frequency, high bandwidth buffering operation. An output of the operational amplifier is fed back to an input of the operational amplifier through a current varying element that varies current levels of the input of the operational amplifier to remove a level shift of an output signal of the differential amplifier.

Abstract: An output driver (121) for a 10BaseT/100BaseTX transceiver provides a drive capability for either a 10BaseT output or a 100BaseTX output. The driver includes a voltage-to-current converter for converting the voltage to a current level which is then selectably switched to the input of two constant output impedance buffers (327) and (328). For the 100BaseTX mode, a constant current is provided to the buffers and then the current switched in a multi-level mode in accordance with an MLT-3 encoding scheme with a current switch (311). The buffers (327) and (328) are trimmed as a function of temperature by varying the current generated by the voltage-to-current converter (303). This trimming is facilitated by generating an internal current with the voltage-to-current converter (303) and then summing therewith a zero temperature coefficient current referenced to an external resistor.

Abstract: A CMOS sense amplifier for use in a memory comprises two CMOS differential amplifiers. Each differential amplifier receives the same two signals generated from a selected bit line pair and each provides a different one of a complementary pair of signals. Each differential amplifier has a current mirror for loads. Each differential amplifier uses a transistor current source. A transistor will operate as a more ideal current source if it is in saturation. The transistor current source is biased by the current mirror of the differential amplifier of which it is a part. The resulting differential amplifier thus has a transistor current source which is biased closer to saturation than if biased by a normal clock signal which is either at the high or low power supply voltage. The self-biasing aspect avoids the problems associated with generating a special reference voltage for the differential amplifier.