Abstract: An available bit rate scheduler for asynchronous transfer mode communication of a plurality of cells over a communication network in which each cell is characterized by a virtual circuit communication channel and in which each virtual circuit is characterized by one or more profiles. Each profile has a group of sub-profiles, with each sub-profile having a unique bandwidth allocation component. The scheduler incorporates a profile queue buffer for receiving, pairing and storing the profiles and sub-profiles and, a link list processor coupled to the profile queue buffer to receive the profile, sub-profile pairs. The link list processor detects null profile, sub-profile pairs in the buffer and, over-write them with a selected one of the virtual circuit profile, sub-profile pairs. A valid pending register of length p bits, and a memory are coupled to the link list processor.

Abstract: A method of scheduling cell transmission over an asynchronous transfer mode communication channel. The channel has a characteristic transmission rate that is related to the system clock frequency .function. and an allowed cell rate ACR expressed as a floating point number having a mantissa m, and an exponent e, where 0.ltoreq.m.ltoreq.511, 0.ltoreq.e.ltoreq.31 and ACR=(1+m/512)*2.sup.e. If m.gtoreq.128 then the reciprocal of the mantissa portion (1+m/512) is evaluated by piece-wise linear approximation of the function: ##EQU1## Otherwise, if m<128 then the mantissa portion is evaluated by piece-wise linear approximation of the function: ##EQU2## A selected cell is then scheduled for transmission at a time T relative to the transmission time T.sub.0 of a cell transmitted immediately prior to the selected cell, where T=T.sub.0 +(ACR.sup.-1)*f.

Abstract: An available bit rate scheduling method and apparatus for asynchronous transfer mode communication of a plurality of cells over a network characterized by a system clock frequency f and an allowed cell rate ACR. Each cell belongs to an assigned virtual circuit communication channel which is defined by a set of negotiated traffic parameters. The invention partitions the ACR's of the virtual circuits into a smaller subset of profiles/sub-profiles and conducts a deterministic search to service them. The scheduler incorporates a profile generator for iteratively generating a number p of the profiles by (i) outputting a k*modulo 2.sup.i th one of the profiles during each kth iteration of the profile generator, where 1.ltoreq.i.ltoreq.p and 1.ltoreq.k.ltoreq.p-1; (ii) outputting a null profile during each 2.sup.p th one of the iterations; and, (iii) dispatching the profiles from the profile generator to the profile queue such that a particular profile is dispatched at a time T=T.sub.0 +(1/ACR)*f, where T.sub.