Patents by Inventor Stephen J. Pearton

Stephen J. Pearton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11531027
    Abstract: Various examples are provided for low cost disposable medical sensors fabricated on glass, paper or plastics, and applications thereof. In one example, a medical sensor includes a base structure comprising a functionalized sensing area; and a transistor disposed on the base structure adjacent to the functionalized sensing area. In another example, a medical sensor includes a base structure comprising a functionalized sensing area disposed on a first electrode pad and a reference sensing area disposed on a second electrode pad separated from the first electrode pad; and a transistor having a gate electrically coupled to the second electrode pad of the base structure. A gate pulse applied to the functionalized sensing can produce a drain current corresponding to an amount of a target present in a sample disposed on the base structure.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: December 20, 2022
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Fan Ren, Stephen J. Pearton
  • Publication number: 20210003528
    Abstract: Various examples are provided for disposable medical sensors that can be used for detection of SARS-CoV-2 antigen, cardiac troponin I, or other biosensing applications. In one example, a medical sensing system includes single-use disposable test strip comprising a functionalized sensing area configured to detect SARS-CoV-2 antigen and a portable sensing and readout device including pulse generation circuitry that can generate synchronized gate and drain pulses for detection and quantification of SARS-CoV-2 antigen in biological samples. In another example, a method includes providing a saliva sample to a functionalized sensing area configured to detect SARS-CoV-2 antigen, generating synchronized gate and drain pulses for a transistor, the gate pulse provided via electrodes of the functionalized sensing area, and sensing an output of the transistor that is a function of a concentration of SARS-CoV-2 antigen in the sample.
    Type: Application
    Filed: September 18, 2020
    Publication date: January 7, 2021
    Inventors: Josephine F. Esquivel-Upshaw, Fan Ren, Stephen J. Pearton, Steven Craig Ghivizzani, Samira Afonso Camargo, Chaker Fares, Minghan Xian, Patrick H. Carey, Jenshan Lin, Siang-Sin Shan, Yu-Te Liao, Shao-Yung Lu
  • Publication number: 20200333286
    Abstract: Various examples are provided for disposable medical sensors that can be used for the detection of cerebral spinal fluid. In one example, a medical sensing system includes a disposable sensing unit comprising a functionalized sensing area disposed between electrodes; and a portable sensing unit analyzer including pulse generation circuitry that can generate synchronized gate and drain pulses and a transistor with a gate electrically coupled to one electrode. A gate pulse output of the pulse generation circuitry is electrically coupled to a second electrode and a drain pulse output is electrically coupled to a drain of the transistor. In another example, a method includes providing a sample to a functionalized sensing area, generating synchronized gate and drain pulses for a transistor, the gate pulse provided via the electrodes and functionalized sensing area, and sensing an output of the transistor that is a function of a target concentration of the sample.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 22, 2020
    Inventors: Marino Leon, Brian C. Lobo, Stephen J. Pearton, Fan Ren, Yu-Te Liao
  • Patent number: 10504811
    Abstract: Materials and methods for improving the DC and RF performance of off-state step-stressed high electron mobility transistors (HEMTs) and devices are provided. A semiconductor device can include at least one HEMT and an on-chip heating source. A method of recovering the DC and RF performance of a stressed semiconductor device can include annealing the device with a built-in heating source of the device.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: December 10, 2019
    Assignee: University of Florida Research Foundation, Incorporated
    Inventors: Fan Ren, Stephen J. Pearton
  • Patent number: 10488364
    Abstract: Methods and apparatuses for detecting ammonia are disclosed. A sensor can include a transistor having a gate, a drain, and a source. A layer of ammonia detecting material can be functionally attached to the transistor. The ammonia detecting material can be zinc oxide (ZnO) nanorods, which effectively functionalize the transistor by changing the amount of current that flows through the gate when a voltage is applied. Alternatively, or in addition to ZnO nanorods, films or nanostructure type metal oxides including TiO2, ITO, ZnO, WO3 and AZO can be used. The transistor is preferably a high electron mobility transistor (HEMT).
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: November 26, 2019
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INCORPORATED
    Inventors: Soohwan Jang, Fan Ren, Stephen J. Pearton
  • Publication number: 20190170738
    Abstract: Various examples are provided for low cost disposable medical sensors fabricated on glass, paper or plastics, and applications thereof. In one example, a medical sensor includes a base structure comprising a functionalized sensing area; and a transistor disposed on the base structure adjacent to the functionalized sensing area. In another example, a medical sensor includes a base structure comprising a functionalized sensing area disposed on a first electrode pad and a reference sensing area disposed on a second electrode pad separated from the first electrode pad; and a transistor having a gate electrically coupled to the second electrode pad of the base structure. A gate pulse applied to the functionalized sensing can produce a drain current corresponding to an amount of a target present in a sample disposed on the base structure.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 6, 2019
    Inventors: Fan Ren, Stephen J. Pearton
  • Patent number: 10269989
    Abstract: A hydrogen sensor can include a substrate, an Ohmic metal disposed on the substrate, a nitride layer disposed on the substrate and having a first window exposing the substrate, a Schottky metal placed in the first window and disposed on the substrate, a final metal disposed on the nitride layer and the Schottky metal and having a second window exposing the Schottky metal, and a polymethyl-methacrylate (PMMA) layer encapsulating the second window. The PMMA layer can fill the second window and be in contact with the Schottky metal.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 23, 2019
    Assignee: University of Florida Research Foundation, Incorporated
    Inventors: Fan Ren, Stephen J. Pearton, Soohwan Jang, Sunwoo Jung
  • Publication number: 20180313785
    Abstract: Methods and apparatuses for detecting ammonia are disclosed. A sensor can include a transistor having a gate, a drain, and a source. A layer of ammonia detecting material can be functionally attached to the transistor. The ammonia detecting material can be zinc oxide (ZnO) nanorods, which effectively functionalize the transistor by changing the amount of current that flows through the gate when a voltage is applied. Alternatively, or in addition to ZnO nanorods, films or nanostructure type metal oxides including TiO2, ITO, ZnO, WO3 and AZO can be used. The transistor is preferably a high electron mobility transistor (HEMT).
    Type: Application
    Filed: April 26, 2018
    Publication date: November 1, 2018
    Inventors: Soohwan Jang, Fan Ren, Stephen J. Pearton
  • Publication number: 20180248048
    Abstract: A hydrogen sensor can include a substrate, an Ohmic metal disposed on the substrate, a nitride layer disposed on the substrate and having a first window exposing the substrate, a Schottky metal placed in the first window and disposed on the substrate, a final metal disposed on the nitride layer and the Schottky metal and having a second window exposing the Schottky metal, and a polymethyl-methacrylate (PMMA) layer encapsulating the second window. The PMMA layer can fill the second window and be in contact with the Schottky metal.
    Type: Application
    Filed: February 27, 2018
    Publication date: August 30, 2018
    Inventors: Fan Ren, Stephen J. Pearton, Soohwan Jang, Sunwoo Jung
  • Publication number: 20180240727
    Abstract: Materials and methods for improving the DC and RF performance of off-state step-stressed high electron mobility transistors (HEMTs) and devices are provided. A semiconductor device can include at least one HEMT and an on-chip heating source. A method of recovering the DC and RF performance of a stressed semiconductor device can include annealing the device with a built-in heating source of the device.
    Type: Application
    Filed: March 25, 2016
    Publication date: August 23, 2018
    Inventors: Fan Ren, Stephen J. Pearton
  • Patent number: 8168965
    Abstract: A semiconductor device includes at least one semiconductor layer, a metal layer in electrical contact with the semiconductor layer, and a carbon nanotube contact layer interposed between the metal layer and the semiconductor layer. The contact layer electrically couples the metal layer to the semiconductor layer and provides a semiconductor contact having low specific contact resistance. The contact layer can be substantially optically transparent layer in at least a portion of the visible light range.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: May 1, 2012
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Andrew Gabriel Rinzler, Stephen J. Pearton
  • Publication number: 20080303121
    Abstract: A multi-layer heatsink module for effecting temperature control in a three-dimensional integrated chip is provided. The module includes a high thermal conductivity substrate having first and second opposing sides, and a gallium nitride (GaN) layer disposed on the first side of the substrate. An integrated array of passive and active elements defining electronic circuitry is formed in the GaN layer. A metal ground plane having first and second opposing sides is disposed on the second side of the substrate, with the first side of the ground plane being adjacent to the second side of the substrate. A dielectric layer of low thermal dielectric material is deposited on the back side of the ground plane, and a metal heatsink is bonded to the dielectric layer. A via extends through the dielectric layer from the metal heatsink to the metal ground plane.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 11, 2008
    Applicant: University of Florida Research Foundation, Inc.
    Inventors: Jenshan Lin, Fan Ren, Stephen J. Pearton, Travis J. Anderson, Brent P. Gila
  • Patent number: 6914273
    Abstract: A GaN based enhancement mode MOSFET includes a GaN layer and a (Group III)xGa1?xN layer, such as an AlxGa1?xN disposed on the GaN layer. The thickness of the AlxGa1?xN layer is less than 20 nm to provide a negligible sheet carrier concentration in the GaN layer along its interface with AlxGa1?xN. A source and a drain region extend through the AlxGa1?xN layer into the GaN layer, the source and drain region separated by a channel region. A gate dielectric is disposed over the channel region. A gate electrode is disposed on the gate dielectric. The MOSFET formed is a true enhancement MOSFET which is in an off state when the gate is unbiased.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: July 5, 2005
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Fan Ren, Cammy Rene Abernathy, Stephen J. Pearton, Yoshihiro Irokawa
  • Publication number: 20040041169
    Abstract: A GaN based enhancement mode MOSFET includes a GaN layer and a (Group III)xGa1-xN layer, such as an AlxGa1-xN disposed on the GaN layer. The thickness of the AlxGa1-xN layer is less than 20 nm to provide a negligible sheet carrier concentration in the GaN layer along its interface with AlxGa1-xN. A source and a drain region extend through the AlxGa1-xN layer into the GaN layer, the source and drain region separated by a channel region. A gate dielectric is disposed over the channel region. A gate electrode is disposed on the gate dielectric. The MOSFET formed is a true enhancement MOSFET which is in an off state when the gate is unbiased.
    Type: Application
    Filed: August 26, 2003
    Publication date: March 4, 2004
    Inventors: Fan Ren, Cammy Rene Abernathy, Stephen J. Pearton, Yoshihiro Irokawa
  • Patent number: 5459097
    Abstract: In accordance with the invention, aluminum-containing layers are grown by molecular beam processes using as an arsenic precursor phenylarsine (PhAs). Because PhAs is more reactive than arsine and less reactive than arsenic, it decomposes selectively on III-V surfaces but not on mask materials. Thus in contrast to conventional processes, growth using PhAs permits selective growth on unmasked gallium arsenide surfaces but inhibits growth on typical mask materials such as silicon nitride.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: October 17, 1995
    Assignee: AT&T Corp.
    Inventors: Cammy R. Abernathy, Stephen J. Pearton, Fan Ren, Patrick W. Wisk
  • Patent number: 5227006
    Abstract: In accordance with the invention, gallium-containing layers are grown by molecular beam processes using as an arsenic precursor a compound of the dialkylaminoarsenic family (DAAAs) such as tris-dimethylamino arsenic (DMAAs). In contrast to conventional arsenic sources, DAAAs act as carbon "getters". When DAAAs are used as an arsenic source, the DAAAs getter carbon impurities from the gallium source. Thus, for example, DAAAs can be used as an arsenic source in combination with TMG as a gallium source to selectively grow high purity or n-type layers of gallium arsenide at low temperatures below 600.degree. C. In addition DMAAs has been found to be an excellent cleaning agent for gallium arsenide materials.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: July 13, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: Cammy R. Abernathy, Stephen J. Pearton, Fan Ren, Patrick W. Wisk
  • Patent number: 5176792
    Abstract: The present applicants have discovered that a layer predominantly comprising tungsten can be formed into precise patterns having substantially vertical walls by using titanium as a mask and plasma etching in a fluorine-containing plasma such as CF.sub.4 or SF.sub.6. The success of the process is believed attributable to the occurrence of an etch stop reaction on the sidewalls of the tungsten. The products of the reaction inhibit horizontal etching. After the tungsten is etched, the titanium mask can be selectively removed, as by etching in dilute HF. Each step in the process can be effected without subjecting the workpiece to voltage magnitudes in excess of 200 volts or temperatures outside the range between room temperature and 200.degree. C.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: January 5, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: Thomas R. Fullowan, Stephen J. Pearton, Fan Ren
  • Patent number: 5168071
    Abstract: Disclosed is a method of making semiconductor devices that comprises etching of a semiconductor layer, with a patterned metal layer acting as the etch mask. The patterned metal layer comprises a mask metal layer (exemplarily Ti) overlying a contact metal layer (exemplarily a Au-containing layer). In an exemplary embodiment the inventive method is used to manufacture InP-based heterojunction bipolar transistors.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: December 1, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Thomas R. Fullowan, Stephen J. Pearton, Fan Ren
  • Patent number: 4751194
    Abstract: A method of fabricating quantum well wires and boxes is described in which interdiffusion in a semiconductor having a compositional profile is enhanced by the presence of defects created by ion implantation in localized regions.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: June 14, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Joel B. Cibert, Arthur C. Gossard, Stephen J. Pearton, Pierre M. Petroff