Patents by Inventor STEPHEN J. WARK

STEPHEN J. WARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11429466
    Abstract: A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.
    Type: Grant
    Filed: June 13, 2020
    Date of Patent: August 30, 2022
    Inventors: Charles J. Horvath, Lei Cao, Steven Michael Haid, John R. MacLeod, Angel L. Pagan, Nathaniel Horwitch Dailey, Wendy J. McNaughton, Stephen J. Wark
  • Patent number: 11281538
    Abstract: A method and system of checkpointing in a computing system having a primary node and a secondary node is disclosed. In one embodiment the method includes the steps of determining by the primary node to initiate a checkpoint process; sending a notification to the secondary node, by the primary node, of an impending checkpoint process; blocking, by the primary node, I/O requests from the Operating System (OS) that arrive at the primary node after the determination to initiate the checkpoint process; completing, by the primary node, active I/O requests for data received from the OS prior to the determination to initiate the checkpoint process, by accessing the primary node data storage; and upon receiving, by the primary node, a notice of checkpoint readiness from the secondary node, initiating a checkpoint process to move state and data from the primary node to the secondary node.
    Type: Grant
    Filed: June 13, 2020
    Date of Patent: March 22, 2022
    Assignee: STRATUS TECHNOLOGIES IRELAND LTD.
    Inventors: Nathaniel Horwitch Dailey, Stephen J. Wark, Angel L. Pagan
  • Publication number: 20210034447
    Abstract: A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.
    Type: Application
    Filed: June 13, 2020
    Publication date: February 4, 2021
    Inventors: Charles J. Horvath, Lei Cao, Steven Michael Haid, John R. MacLeod, Angel L. Pagan, Nathaniel Horwitch Dailey, Wendy J. McNaughton, Stephen J. Wark
  • Publication number: 20210034464
    Abstract: A method and system of checkpointing in a computing system having a primary node and a secondary node is disclosed. In one embodiment the method includes the steps of determining by the primary node to initiate a checkpoint process; sending a notification to the secondary node, by the primary node, of an impending checkpoint process; blocking, by the primary node, I/O requests from the Operating System (OS) that arrive at the primary node after the determination to initiate the checkpoint process; completing, by the primary node, active I/O requests for data received from the OS prior to the determination to initiate the checkpoint process, by accessing the primary node data storage; and upon receiving, by the primary node, a notice of checkpoint readiness from the secondary node, initiating a checkpoint process to move state and data from the primary node to the secondary node.
    Type: Application
    Filed: June 13, 2020
    Publication date: February 4, 2021
    Applicant: Stratus Technologies Bermuda, Ltd.
    Inventors: Nathaniel Horwitch Dailey, Stephen J. Wark, Angel L. Pagan
  • Patent number: 10871908
    Abstract: A highly available computer system has a primary compute node and a secondary compute node, both of which operate to support at least one similar process using the same instructions and the same information at substantially the same time, and in the event that the secondary compute node generates a read request that is not able to be serviced by cache memory local to it, then the secondary compute node redirects the read request to the primary compute node for servicing.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: December 22, 2020
    Assignee: Stratus Technologies Ireland, Ltd.
    Inventors: Nathaniel H Dailey, Angel Pagan, Stephen J Wark
  • Publication number: 20200341665
    Abstract: A highly available computer system has a primary compute node and a secondary compute node, both of which operate to support at least one similar process using the same instructions and the same information at substantially the same time, and in the event that the secondary compute node generates a read request that is not able to be serviced by cache memory local to it, then the secondary compute node redirects the read request to the primary compute node for servicing.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 29, 2020
    Inventors: NATHANIEL H. DAILEY, ANGEL PAGAN, STEPHEN J. WARK
  • Patent number: 10095590
    Abstract: A fault tolerant computer system having two virtual machines (VMs), each running on a separate host device, is connected over a network to one or more I/O devices. The system operates to monitor the health of one or more operational characteristics associated with each VM, and in the event that the health of both virtual machines dictates that one or the other of the VMs should be downgraded, but the system is not able to determine which VM should be downgraded and there is an imbalance in a monitored system operational characteristic, the system can defer downgrading one VM for a selected period of time during which the operational characteristic that is in imbalance is monitored. If the imbalance is resolved, the downgrade is cancelled, if an operational fault is confirmed prior to the expiration of the deferral period or if the deferral period expires, then one host is downgraded.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: October 9, 2018
    Inventors: Thomas D Bissett, Stephen J Wark, Paul A Leveille, James D McCollum, Angel L Pagan
  • Patent number: 9924001
    Abstract: A method of allowing egress network frames to bypass the buffer requirement of a checkpoint system. In one embodiment, the method includes the steps of examining a frame, or its attributes, to determine if it is a “candidate frame” and if the frame is a candidate frame, allowing it to be released to the external network without an intervening checkpoint. In another embodiment, the candidate frame is one of a group comprising: any frame targeting a designated network interface; any frame of a designated protocol type; any frame sourced or destined from/to a designated address. In still another embodiment, the method includes the designation of scheduling follow-up checkpoints according to frame disposition to limit or reduce the effects of a fail-over (roll-back) disturbance.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: March 20, 2018
    Assignee: Stratus Technologies, Inc.
    Inventors: Stephen J Wark, Srinivasu Chinta, Paul A Leveille, Leslie R Sibley
  • Publication number: 20160373560
    Abstract: A method of allowing egress network frames to bypass the buffer requirement of a checkpoint system. In one embodiment, the method includes the steps of examining a frame, or its attributes, to determine if it is a “candidate frame” and if the frame is a candidate frame, allowing it to be released to the external network without an intervening checkpoint. In another embodiment, the candidate frame is one of a group comprising: any frame targeting a designated network interface; any frame of a designated protocol type; any frame sourced or destined from/to a designated address. In still another embodiment, the method includes the designation of scheduling follow-up checkpoints according to frame disposition to limit or reduce the effects of a fail-over (roll-back) disturbance.
    Type: Application
    Filed: May 23, 2016
    Publication date: December 22, 2016
    Inventors: STEPHEN J. WARK, SRINIVASU CHINTA, PAUL A. LEVEILLE, LESLIE R. SIBLEY
  • Publication number: 20160328302
    Abstract: A fault tolerant computer system having two virtual machines (VMs), each running on a separate host device, is connected over a network to one or more I/O devices. The system operates to monitor the health of one or more operational characteristics associated with each VM, and in the event that the health of both virtual machines dictates that one or the other of the VMs should be downgraded, but the system is not able to determine which VM should be downgraded and there is an imbalance in a monitored system operational characteristic, the system can defer downgrading one VM for a selected period of time during which the operational characteristic that is in imbalance is monitored. If the imbalance is resolved, the downgrade is cancelled, if an operational fault is confirmed prior to the expiration of the deferral period or if the deferral period expires, then one host is downgraded.
    Type: Application
    Filed: May 5, 2016
    Publication date: November 10, 2016
    Inventors: THOMAS D. BISSETT, STEPHEN J. WARK, PAUL A. LEVEILLE, JAMES D. MCCOLLUM, ANGEL L. PAGAN
  • Publication number: 20160328304
    Abstract: A fault tolerant computer system is connected over a network with one or more I/O devices. The fault-tolerant computer system has two host devices each of which support a virtual machine (VM) that operates on the same set of instructions (FT application) at substantially the same time, and each VM is allocated space on different virtual containers. In the event that the operational state of one VM is downgraded, due to the unexpected failure of a virtual container associated with it, a mirroring operation is initiated that does not copy empty blocks of information from a source virtual container to a virtual container associated with the downgraded VM if corresponding blocks on the source and the target virtual containers have do not contain any information.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 10, 2016
    Inventors: STEPHEN J. WARK, ANGEL L. PAGAN