Patents by Inventor Stephen John SQUE

Stephen John SQUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11133299
    Abstract: An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: September 28, 2021
    Assignee: NXP B.V.
    Inventors: Da-Wei Lai, Stephen John Sque, Wilhelmus Cornelis Maria Peters
  • Publication number: 20200111778
    Abstract: An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Da-Wei LAI, Stephen John SQUE, Wilhelmus Cornelis Maria PETERS
  • Patent number: 10475783
    Abstract: Various embodiments are directed to electrostatic discharge (ESD) protection apparatus comprising a bipolar junction transistor (BJT) having terminals, a field-effect transistor (FET) having terminals, and a common base region connected to a recombination region. The BJT and the FET are integrated with one another and include a common region that is shared by the BJT and the FET. The BJT and FET collectively bias the common base region and prevent triggering of the BJT by causing a potential of the common base region to follow a potential of one of the terminals of the BJT in response to an excessive but tolerable non-ESD voltage change at one or more of the terminals.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: November 12, 2019
    Assignee: NXP B.V.
    Inventors: Jan Claes, Stephen John Sque, Maarten Jacobus Swanenberg, Da-Wei Lai
  • Publication number: 20190115340
    Abstract: Various embodiments are directed to electrostatic discharge (ESD) protection apparatus comprising a bipolar junction transistor (BJT) having terminals, a field-effect transistor (FET) having terminals, and a common base region connected to a recombination region. The BJT and the FET are integrated with one another and include a common region that is shared by the BJT and the FET. The BJT and FET collectively bias the common base region and prevent triggering of the BJT by causing a potential of the common base region to follow a potential of one of the terminals of the BJT in response to an excessive but tolerable non-ESD voltage change at one or more of the terminals.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 18, 2019
    Inventors: Jan Claes, Stephen John Sque, Maarten Jacobus Swanenberg, Da-Wei Lai
  • Patent number: 9349819
    Abstract: Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: May 24, 2016
    Assignee: NXP B.V.
    Inventors: Godefridus Adrianus Maria Hurkx, Jeroen Antoon Croon, Johannes Josephus Theodorus Marinus Donkers, Jan Sonsky, Stephen John Sque, Andreas Bernardus Maria Jansman, Markus Mueller, Stephan Heil, Tim Boettcher
  • Publication number: 20160020296
    Abstract: Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Application
    Filed: May 18, 2015
    Publication date: January 21, 2016
    Inventors: Godefridus Adrianus Maria Hurkx, Jeroen Antoon Croon, Johannes Josephus Theodorus Marinus Donkers, Jan Sonsky, Stephen John Sque, Andreas Bernardus Maria Jansman, Markus Mueller, Stephan Heil, Tim Boettcher
  • Patent number: 9064847
    Abstract: Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: June 23, 2015
    Assignee: NXP B.V.
    Inventors: Godefridus Andrianus Maria Hurkx, Jeroen Antoon Croon, Johannes Josephus Theodorus Marinus Donkers, Jan Sonsky, Stephen John Sque, Andreas Bernardus Maria Jansman, Markus Mueller, Stephan Heil, Tim Boettcher
  • Publication number: 20130320400
    Abstract: Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.
    Type: Application
    Filed: May 15, 2013
    Publication date: December 5, 2013
    Applicant: NXP B.V.
    Inventors: Godefridus Adrianus Maria HURKX, Jeroen Antoon CROON, Johannes Josephus Theodorus Marinus Donkers, Jan Sonsky, Stephen John SQUE, Andreas Bernardus Maria JANSMAN, Markus MUELLER, Stephan HEIL, Tim BOETTCHER