Patents by Inventor Stephen Kurt Shultz

Stephen Kurt Shultz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for integrated circuit design verification
    Patent number: 6321186
    Abstract: A method for verifying an integrated circuit design using constraint information to develop a weighted data structure. In one embodiment, a binary decision diagram (BDD) includes a plurality of nodes (401, 402, 403, 404, 405, 406, 407, 420, and 430) representing signals and states in the circuit, and each node has a branching probability based on user-defined weights. The BDD represents the intersection of the input space and state space which satisfies the constraints. Current state information resulting from simulation is used to dynamically adjust the branching probabilities of the BDD on the fly. In one embodiment, the constraint information is applicable for formal verification of a portion of the circuit. In another embodiment, a simulation controller (12) receives design and constraint information and generates the program to control simulator (14).
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: November 20, 2001
    Assignee: Motorola, Inc.
    Inventors: Jun Yuan, Carl P. Pixley, Stephen Kurt Shultz, Hillel Miller