Abstract: A method for tuning and aligning an electronically tuned FM broadcast receiver is described. The system described compensates for the mismatch of component values between the antenna and RF amplifier tuned circuits, and the IF offset between the local oscillator frequency and the center frequencies of the antenna and RF resonant circuits by developing independent tuning signals for the circuits. The system also provides temperature compensation, and can be aligned without mechanically adjusting inductors and/or capacitors in the tuned circuits.

Abstract: A Phase Locked Loop (PLL) circuit includes a control signal generator, a digital phase detector, logic gates, a charge pump (charge/discharge circuit), a transmission gate, a loop filter, a lead-lag filter and a voltage controlled oscillator (VCO). Outputs of the digital phase detector are coupled through the logic gates to inputs of the charge pump. An output of the charge pump is coupled to the capacitor and to a first input/output of the transmission gate. A second input/output of the transmission gate is coupled to an input of the loop filter whose output is coupled to an input of the VCO whose output is coupled to a first input of the digital phase detector. A second input of the digital phase detector is coupled to a source of a reference frequency signal. The control signal generator generates non-overlapping complementary control signals with one of same connected to the logic gates and the other connected to the transmission gate.

Abstract: An enhancement implant used in late programming of a ROM in an integrated circuit is combined with a depletion implant used much earlier in the fabrication process to also permit late programming of power paths in the integrated circuit. The implants must be matched and the IC heated after the enhancement implant.