Abstract: A wideband amplifier circuit provides high current gain and a wide bandwidth by employing only npn transistors, which have better high-frequency characteristics than those of pnp transistors, in the signal path. Wideband current amplification is achieved using npn transistors in a current-mirror configuration, with base-emitter voltage matching to permit the current gain to be easily set as a function of transistor area. The wideband amplifier circuit can also be used in a differential wideband amplifier configuration to obtain a combination of high current gain, wide bandwidth and wide output swing not obtainable with conventional differential amplifiers.

Abstract: A current limit circuit for protection of an intelligent power switch includes a series circuit of a sense transistor and a sense resistor coupled to the power semiconductor transistor switch so that the sense resistor current is a fraction of, and is proportional to, the power transistor current. A pull-down transistor is coupled to the control electrode of the power transistor switch. A feedback circuit including a series connection of a diode-connected transistor and a reference V source is coupled between the sense resistor and the control electrode of the pull down transistor. The feedback circuit produces a voltage level shift and the circuit provides an accurate limit on the power transistor current independent of any variations in threshold voltage.

Abstract: In power integrated circuits having both control circuit components and at least one power device, the circuit components are typically isolated from the power device by placing them in separate "wells" of opposite conductivity type to that of the underlying substrate. However, when these power integrated circuits are used in applications (such as automotive electronics) where supply voltage can be inadvertently reversed, large and potentially damaging currents can flow through the circuit components. In order to prevent such large reverse currents from flowing, an additional p-n junction is incorporated within the circuit "well", thus preventing undesirably large reverse current flow. However, introduction of this addition p-n junction creates a vertical transistor within the device, thus creating another potentially damaging current path and also creating potential reverse breakdown voltage problems.

Abstract: An integrated charge pump circuit with back bias voltage reduction includes one or more diode type voltage-multiplier stages, with each stage having a diode-connected NMOS transistor in place of the conventionally-used p-n junction diode. The transistors are formed within a P-type well, which forms the back gate of each transistor within the well, and the transistor threshold voltages are dependent on the potential of the P-type well. Performance of the charge pump circuit using NMOS transistors is enhanced by the use of a bias circuit which generates a bias voltage as a function of the output voltage generated by the charge pump circuit, and applies this bias voltage to the P-type well to minimize the back-body effects of the NMOS transistors. The bias circuit thus permits the construction of an integrated charge pump circuit with significantly lower MOS diode voltage drops than would otherwise be possible.

Abstract: A bilevel current limiting control circuit which enables a semiconductor controlled power switch with a limited power handling capability to operate near the inside border of the safe operating area (SOA) characteristic of the power switch. The control circuit is especially useful in limiting the turn-on inrush surge current to an incandescent lamp load supplied via the semiconductor power switch. The control circuit includes a series circuit made up of the power switch, a current sensing resistor and a lamp load connected to the terminals of a source of supply voltage. First and second comparison circuits, arranged to provide first and second different current limits for the control circuit, are connected to the sensing resistor. A third comparison circuit compares the load voltage with a reference voltage to control a selector device that selects the output of the first or second comparison circuit as a function of the level of the load voltage.

Abstract: A tunable drain-biased transresistance (DBT) device for generating accurate linearly variable RC values employs first and second matched MOS transistors connected in first and second series circuits with third and fourth matched MOS transistors, respectively, across the terminals of a source of supply voltage. A differential amplifier has first and second input terminals connected to respective drain electrodes of the first and second MOS transistors and an output coupled via a feedback circuit to at least one of its input terminals. A pair of signal input terminals are connected to the gate electrodes of the first and second transistors so that said input terminals operate into a high impedance. A source of adjustable bias voltage (V.sub.B) is connected in common to the gate electrodes of the third and fourth transistors thereby to supply adjustable bias currents (I.sub.B) to the drain electrodes of the first and second transistors so as to bias these transistors into their triode regions.

Abstract: A power integrated-circuit device is protected against load voltage surges. This is done by providing an alternate current-carrying path that is activated only in response to the occurrence of such surges. This alternate path is independent of and separate from the connection that extends between the device and its power supply source. In addition, circuitry is connected to the device to limit the portion of the surge voltage that can appear across critical elements of the device.

Abstract: A Metal-Oxide Semiconductor (MOS) high gain amplifying stage which overcomes the inherently low transconductance, gm, of MOS transistors is described. This is achieved by using a specially configured load transistor in combination with a driver transistor. The load transistor is provided, by means of positive feedback, with a current generator which is dependent on the output voltage of the stage and has an effective negative output conductance. The positive feedback is achieved by connecting an appropriate attenuation stage between the output and the input of the load transistor. By the cancellation of output conductances between the driver and load transistors, a near infinite voltage gain can be achieved despite resistive loading at the output of the amplifier. The MOS amplifying stage has application in amplifiers, comparators and oscillators.