Abstract: Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension.

Abstract: Disclosed is a printed circuit board, and a method of preparing a printed circuit board, which possesses a coefficient of thermal expansion substantially similar to that of silicon for use in direct semiconductor chip attach structures and similar solder mounted devices. The printed circuit board is fabricated from prepreg having a thermosetting resin and a reinforcement layer consisting of non-woven aramid mat or a liquid crystalline polymer paper. The composite dielectric layer optionally includes plated through holes which are either filled or non-filled, and one or more thin film redistribution layers to provide high density electronic packages. The design places the solder pads at the PTHs where needed. The redistribution layer can be formed using photoimagable dielectrics or laminated controlled-CTE composites and laser via imaging.

Abstract: The present invention provides a method for electrolessly depositing metal onto a substrate, comprising: exposing a surface of the substrate to a first solution including a surfactant; and exposing the surface, having residual surfactant from the first solution thereon, to a second solution including ions of an electroconductive metal element for plating the surface with the electroconductive metal while exposed to the second solution; wherein the surface is exposed to the first solution immediately prior to exposing the surface to the second solution.

Abstract: Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension.

Abstract: The method for forming circuitization of the present invention provides a circuitized product which does not have a blanket seed layer and only has seed layer under the metal circuitization. Thus, short circuits between circuit lines are eliminated. It is a further advantage of the method of the present invention that it does not involve stripping portions of the seed layer. The method of the present invention requires less processing steps than conventional methods and employs positive resists which are developable by aqueous alkaline solutions.

Abstract: A structure including a halogenated polymeric-containing layer. At least a portion of a surface of the halogenated polymeric-containing layer is electrochemically reduced. An electrically conductive pattern is provided over at least a portion of the electrochemically reduced portion of the halogenated polymeric-containing layer.

Abstract: The invention involves a fluid treatment device and fluid treatment method to solution or melt coat or impregnate a resin or polymer to a predetermined, metered thickness into a substrate. The invention is effective in impregnating or coating various substrates in both a continuous or batch process on one side, two sides, or in the case of a porous substrate, penetration and complete saturation is possible. The invention offers significant advantages and benefits over existing methods and equipment and allows the coating or impregnation process to be performed at lower cost and higher efficiency with increased environmental safety.

Abstract: This invention describes a new process for the selective isolation of through holes in the production of a multi-layer printed circuit card which allows for substantially smaller holes through reference layers to be built, leading to substantially better electrical isolation of signal traces on adjacent wiring layers, and for substantially improved current carrying capacity in the reference layers. This invention also describes a process to allow reference layers of different thickness from adjacent signal layers, even if they are part of the same `core`. Several different process flows are disclosed, leading to substantially the same structure but with varying degrees of complexity and quality of the finished product.

Abstract: A halogenated polymeric material is exposed to a reducing agent and/or an electrolyte and applied voltage to render exposed portions capable of being metallized and of being etched. The exposed portions can also be doped to thereby induce electrical conductivity therein. Also, new structures containing a free standing halogenated polymeric-containing layer and electrical conductive pattern thereon are provided.

Abstract: A halogenated polymeric material is exposed to a reducing agent and/or an electrolyte and applied voltage to render exposed portions capable of being metallized and of being etched. The exposed portions can also be doped to thereby induce electrical conductivity therein. Also, new structures containing a free standing halogenated polymeric-containing layer and electrical conductive pattern thereon are provided.

Abstract: A method of treating a halogenated polymeric-containing substrate including exposing at least portions of the halogenated polymeric-containing substrate to a composition containing a reducing agent and an aprotic solvent selected from the group consisting of nitriles, nitro compounds, amides, esters, carbonates, oxides, sulfo compounds and mixtures thereof. The solvent is free of ethers, amines, ammonia. The composition is prepared by reacting a metal with an organic compound selected from the group consisting of polyaryl compounds, aromatic carbonyl containing compounds, aromatic nitriles, and aromatic heterocyclic nitrogen containing compounds in a reaction solvent that does not react with the metal but permits reaction between the metal and the organic compound to thereby provide the reducing agent. The reducing agent is isolated from the reaction solvent to obtain a reaction product as a solid. The reaction product is added to the aprotic solvent.