Patents by Inventor Stephen Lew
Stephen Lew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9232238Abstract: A system for, and method of, pixel data compression and a smartphone incorporating the system or the method. In one embodiment, the system includes: (1) a differential pulse code modulation encoder operable differentially to compress the two pixel values losslessly to yield two losslessly compressed pixel values and (2) an entropy encoder coupled to the differential pulse code modulation encoder and configured to receive and entropy-encode the losslessly compressed pixel values using a tiered technique to yield entropy-encoded, losslessly compressed pixel values. values using a tiered technique to yield Huffman-encoded, losslessly compressed pixel values.Type: GrantFiled: January 16, 2014Date of Patent: January 5, 2016Assignee: Nvidia CorporationInventors: Joshua Wise, Stephen Lew
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Publication number: 20150201219Abstract: A system for, and method of, pixel data compression and a smartphone incorporating the system or the method. In one embodiment, the system includes: (1) a differential pulse code modulation encoder operable differentially to compress the two pixel values losslessly to yield two losslessly compressed pixel values and (2) an entropy encoder coupled to the differential pulse code modulation encoder and configured to receive and entropy-encode the losslessly compressed pixel values using a tiered technique to yield entropy-encoded, losslessly compressed pixel values. values using a tiered technique to yield Huffman-encoded, losslessly compressed pixel values.Type: ApplicationFiled: January 16, 2014Publication date: July 16, 2015Applicant: Nvidia CorporationInventors: Joshua Wise, Stephen Lew
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Patent number: 8736617Abstract: A method of displaying graphics data is described. The method involves accessing the graphics data in a memory subsystem associated with one graphics subsystem. The graphics data is transmitted to a second graphics subsystem, where it is displayed on a monitor coupled to the second graphics subsystem.Type: GrantFiled: August 4, 2008Date of Patent: May 27, 2014Assignee: Nvidia CorporationInventors: Stephen Lew, Bruce R. Intihar, Abraham B. de Waal, David G. Reed, Tony Tamasi, David Wyatt, Franck R. Diard, Brad Simeral
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Patent number: 7903123Abstract: A programmable system for dithering video data. The system is operable in at least two user-selectable modes which can include a small kernel mode and a large kernel mode. In some embodiments, the system is operable in at least one mode in which it applies two or more kernels (each from a different kernel sequence) to each block of video words. Each kernel sequence repeats after a programmable number of the blocks (e.g., a programmable number of frames containing the blocks) have been dithered. The period of repetition is preferably programmable independently for each kernel sequence. The system preferably includes a frame counter for each kernel sequence. Each counter generates an interrupt when the number of frames of data dithered by kernels of the sequence has reached a predetermined value. In response to the interrupt, software can change the kernel sequence being applied. Typically, the system performs both truncation and dithering on words of video data.Type: GrantFiled: December 14, 2007Date of Patent: March 8, 2011Assignee: NVIDIA CorporationInventors: Jonah M. Alben, Stephen Lew
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Patent number: 7760209Abstract: Video conversion using a 3D graphics pipeline of a graphical processing unit (GPU) is disclosed. A plurality of video data formatted in a first video format is accessed from a memory unit. Moreover, the plurality of video data is converted from the first video format to a second video format using a 3D graphics pipeline of the GPU. The plurality of video data formatted in the second video format is sent to the memory unit. The 3D graphics pipeline applies a filtering technique. In an embodiment, the filtering technique is an interpolation technique.Type: GrantFiled: December 17, 2007Date of Patent: July 20, 2010Assignee: NVIDIA CorporationInventors: Garry W. Amann, Stephen Lew, Sanford S. Lum
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Publication number: 20100026692Abstract: A method of displaying graphics data is described. The method involves accessing the graphics data in a memory subsystem associated with one graphics subsystem. The graphics data is transmitted to a second graphics subsystem, where it is displayed on a monitor coupled to the second graphics subsystem.Type: ApplicationFiled: August 4, 2008Publication date: February 4, 2010Applicant: NVIDIA CORPORATIONInventors: Stephen Lew, Bruce R. Intihar, Abraham B. de Waal, David G. Reed, Tony Tamasi, David Wyatt, Franck R. Diard, Brad Simeral
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Patent number: 7511714Abstract: Video conversion using a 3D graphics pipeline of a graphical processing unit (GPU) is disclosed. A plurality of video data formatted in a first video format is accessed from a memory unit. Moreover, the plurality of video data is converted from the first video format to a second video format using a 3D graphics pipeline of the GPU. The plurality of video data formatted in the second video format is sent to the memory unit. The 3D graphics pipeline applies a filtering technique. In an embodiment, the filtering technique is an interpolation technique.Type: GrantFiled: November 10, 2003Date of Patent: March 31, 2009Assignee: NVIDIA CorporationInventors: Garry W. Amann, Stephen Lew, Sanford S. Lum
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Patent number: 7483039Abstract: A programmable system for dithering video data. The system is operable in at least two user-selectable modes which can include a small kernel mode and a large kernel mode. In some embodiments, the system is operable in at least one mode in which it applies two or more kernels (each from a different kernel sequence) to each block of video words. Each kernel sequence repeats after a programmable number of the blocks (e.g., a programmable number of frames containing the blocks) have been dithered. The period of repetition is preferably programmable independently for each kernel sequence. The system preferably includes a frame counter for each kernel sequence. Each counter generates an interrupt when the number of frames of data dithered by kernels of the sequence has reached a predetermined value. In response to the interrupt, software can change the kernel sequence being applied. Typically, the system performs both truncation and dithering on words of video data.Type: GrantFiled: October 26, 2005Date of Patent: January 27, 2009Assignee: NVIDIA CorporationInventors: Jonah M. Alben, Stephen Lew
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Publication number: 20080122860Abstract: Video conversion using a 3D graphics pipeline of a graphical processing unit (GPU) is disclosed. A plurality of video data formatted in a first video format is accessed from a memory unit. Moreover, the plurality of video data is converted from the first video format to a second video format using a 3D graphics pipeline of the GPU. The plurality of video data formatted in the second video format is sent to the memory unit. The 3D graphics pipeline applies a filtering technique. In an embodiment, the filtering technique is an interpolation technique.Type: ApplicationFiled: December 17, 2007Publication date: May 29, 2008Inventors: Garry W. Amann, Stephen Lew, Sanford S. Lum
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Publication number: 20060176308Abstract: A multidimensional datapath processing system for a video processor for executing video processing operations. The video processor includes a scalar execution unit configured to execute scalar video processing operations and a vector execution unit configured to execute vector video processing operations. A data store memory is included for storing data for the vector execution unit. The data store memory includes a plurality of tiles having symmetrical bank data structures arranged in an array. The bank data structures are configured to support accesses to different tiles of each bank.Type: ApplicationFiled: November 4, 2005Publication date: August 10, 2006Inventors: Ashish Karandikar, Shirish Gadre, Stephen Lew, Christopher Cheng
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Publication number: 20060176309Abstract: A video processor for executing video processing operations. The video processor includes a host interface for implementing communication between the video processor and a host CPU. A memory interface is included for implementing communication between the video processor and a frame buffer memory. A scalar execution unit is coupled to the host interface and the memory interface and is configured to execute scalar video processing operations. A vector execution unit is coupled to the host interface and the memory interface and is configured to execute vector video processing operations.Type: ApplicationFiled: November 4, 2005Publication date: August 10, 2006Inventors: Shirish Gadre, Ashish Karandikar, Stephen Lew, Christopher Cheng
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Publication number: 20060152520Abstract: A stream based memory access system for a video processor for executing video processing operations. The video processor includes a scalar execution unit configured to execute scalar video processing operations and a vector execution unit configured to execute vector video processing operations. A frame buffer memory is included for storing data for the scalar execution unit and the vector execution unit. A memory interface is included for establishing communication between the scalar execution unit and the vector execution unit and the frame buffer memory. The frame buffer memory comprises a plurality of tiles. The memory interface implements a first sequential access of tiles and implements a second stream comprising a second sequential access of tiles for the vector execution unit or the scalar execution unit.Type: ApplicationFiled: November 4, 2005Publication date: July 13, 2006Inventors: Shirish Gadre, Ashish Karandikar, Stephen Lew
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Publication number: 20060103659Abstract: A latency tolerant system for executing video processing operations. The system includes a host interface for implementing communication between the video processor and a host CPU, a scalar execution unit coupled to the host interface and configured to execute scalar video processing operations, and a vector execution unit coupled to the host interface and configured to execute vector video processing operations. A command FIFO is included for enabling the vector execution unit to operate on a demand driven basis by accessing the memory command FIFO. A memory interface is included for implementing communication between the video processor and a frame buffer memory. A DMA engine is built into the memory interface for implementing DMA transfers between a plurality of different memory locations and for loading the command FIFO with data and instructions for the vector execution unit.Type: ApplicationFiled: November 4, 2005Publication date: May 18, 2006Inventors: Ashish Karandikar, Shirish Gadre, Stephen Lew
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Patent number: 6982722Abstract: A programmable system for dithering video data. The system is operable in at least two user-selectable modes which can include a small kernel mode and a large kernel mode. In some embodiments, the system is operable in at least one mode in which it applies two or more kernels (each from a different kernel sequence) to each block of video words. Each kernel sequence repeats after a programmable number of the blocks (e.g., a programmable number of frames containing the blocks) have been dithered. The period of repetition is preferably programmable independently for each kernel sequence. The system preferably includes a frame counter for each kernel sequence. Each counter generates an interrupt when the number of frames of data dithered by kernels of the sequence has reached a predetermined value. In response to the interrupt, software can change the kernel sequence being applied. Typically, the system performs both truncation and dithering on words of video data.Type: GrantFiled: September 3, 2002Date of Patent: January 3, 2006Assignee: NVIDIA CorporationInventors: Jonah M. Alben, Stephen Lew
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Patent number: 6188967Abstract: An arrangement and a method for the utilization of audio signals as a feedback mechanism which is employed for the controlling of manufacturing processes; particularly for monitoring the process parameters and operating conditions.Type: GrantFiled: May 27, 1998Date of Patent: February 13, 2001Assignee: International Business Machines CorporationInventors: Jerome M. Kurtzberg, Menachem Levanoni, John Stephen Lew
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Patent number: 6137042Abstract: A visual display is provide for music associated with a theremin or, in general, any space-controlled electric instrument. The theremin is a space-controlled electric instrument that produces an output of sound corresponding to the motion of the user, without being touched by the user. The device establishes a correspondence between motion and electric signals, then between such signals and either light and sound, or just light.Type: GrantFiled: May 7, 1998Date of Patent: October 24, 2000Assignee: International Business Machines CorporationInventors: Jerome M. Kurtzberg, John Stephen Lew
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Patent number: 6120552Abstract: The present invention describes a method for a one-pass parsing algorithm for generation of a Polish string that computationally defines the maximal possible parallel execution of a general class of arithmetic expressions using one operator stack and two operand stacks. This invention relaxes the assumption that in a processor, only one operation can be performed at any given time.Type: GrantFiled: May 27, 1998Date of Patent: September 19, 2000Assignee: International Business Machines CorporationInventors: Jerome M. Kurtzberg, Menachem Levanoni, John Stephen Lew
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Patent number: 6108592Abstract: A motorized wheel-chair is equipped with one or more sensors for detecting obstacles. The detection method may be either radar or sonar (or both). An on-board computer processes these echoes and presents a visual or auditory display. With the benefit of these displays, the user issues voice commands (or exerts manual pressure) to maneuver appropriately the motorized wheelchair. One or more microphones pick up the sounds of the user's voice and transmit them to a computer. The computer decodes the maneuvering commands by speech-recognition techniques and transmits these commands to the wheelchair to effect the desired motion. In addition to speech recognition for decoding commands, voice (speaker) recognition is employed to determine authorized users.Type: GrantFiled: May 7, 1998Date of Patent: August 22, 2000Assignee: International Business Machines CorporationInventors: Jerome M. Kurtzberg, John Stephen Lew