Patents by Inventor Stephen M. Watts

Stephen M. Watts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for expediting the delivery of food orders to customers
    Patent number: 11989991
    Abstract: Automated food delivery methods and systems using computer-managed delivery to an array of food delivery enclosures and computer-enabled customer access to the food delivered to the enclosures. Customers using the methods and systems may utilize their personal communication device such as a cell phone or tablet to order food and subsequently open an enclosure containing their food order.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: May 21, 2024
    Assignee: GFC Automat Inc.
    Inventors: Alexander Agapov, Steven R. Baker, Robert A. Baydale, Shawn C. Inman, Christopher M. Mele, Norman L. Norris, Joseph F. Scutellaro, Stephen M. Scutellaro, Craig C. Stickler, Richard L. Watts
  • Sound damping wallboard and method of forming a sound damping wallboard
    Patent number: 11939765
    Abstract: A sound damping wallboard and methods of forming a sound damping wallboard are disclosed. The sound damping wallboard comprises a gypsum layer with a gypsum surface having an encasing layer. The encasing layer is partially removed to expose the gypsum surface and form a gypsum surface portion and a first encasing layer portion on the gypsum layer. A sound damping layer is applied to the gypsum layer to cover at least part of the gypsum surface portion and the encasing layer portion.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: March 26, 2024
    Assignee: Gold Bond Building Products, LLC
    Inventors: Michael N. Blades, John M. Watt, John E. Yakowenko, Todd D. Broud, Keith R. O'Leary, Stephen A. Cusa, Mauricio Quiros, Brian G. Randall, Richard P. Weir
  • Parallel integrated circuit test apparatus and test method
    Patent number: 6731127
    Abstract: A test apparatus (300) comprising a single handler (304) is coupled to a first tester (336) and second tester (308). A first test procedure is performed on a set of second IC's using the first tester (336), simultaneously while a second test procedure is performed on a first set of IC's using the second tester (308). Sets of IC's are tested sequentially, in parallel, by a plurality of testers (336/308) within a single handler (304).
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 4, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Stephen M. Watts
  • Parallel integrated circuit test apparatus and test method
    Publication number: 20030117162
    Abstract: A test apparatus (300) comprising a single handler (304) is coupled to a first tester (336) and second tester (308). A first test procedure is performed on a set of second IC's using the first tester (336), simultaneously while a second test procedure is performed on a first set of IC's using the second tester (308). Sets of IC's are tested sequentially, in parallel, by a plurality of testers (336/308) within a single handler (304).
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventor: Stephen M. Watts