Patents by Inventor Stephen McGARRY
Stephen McGARRY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240123775Abstract: In one aspect, a tire monitoring apparatus having a circuit board, battery, and valve body intermediate the circuit board and the battery. The valve body has an attachment end portion for connecting to a valve stem of a tire, a filling end portion, and an internal passageway to permit air to travel from the filling end portion to the attachment end portion. The circuit board has a sensor configured to detect a variable of air traveling in the internal passageway of the valve body and communication circuitry of the circuit board operable to wirelessly communicate data associated with the variable of the air. The tire monitoring apparatus further includes a support permanently encapsulating the circuit board and battery about the valve body. The support includes a structural member molded onto the valve body and an embedding member securing the circuit board and the battery to the structural member.Type: ApplicationFiled: October 13, 2023Publication date: April 18, 2024Inventors: Michael Robinett, Stephen McGarry, Jeremiah Eriksen, Natalie Clouse, John Connell, Brett Buchholtz
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Publication number: 20240015886Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: ApplicationFiled: September 22, 2023Publication date: January 11, 2024Inventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Patent number: 11812553Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: GrantFiled: April 28, 2022Date of Patent: November 7, 2023Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Publication number: 20230268705Abstract: Electrical connector assembly devices, systems, and methods including a demating device configured to separate a first connector and a second connector of an electrical connector assembly. The demating device includes a housing body, a drive assembly including: a drive lever, a trigger configured to push against the drive lever, a drive assembly rod, and a spring mounted around the drive assembly rod; and a demating assembly including: a movable plate having at least two sides, wherein each of the two sides includes at least two prongs; a stationary plate having at least two sides, wherein each of the two sides includes at least two prongs; and a rotary actuator configured to rotate the movable plate.Type: ApplicationFiled: February 23, 2022Publication date: August 24, 2023Inventors: Stephen McGarry Hatch, James Alexander Zandstra
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Publication number: 20230072115Abstract: A system for providing selective adhesion printed circuit board (PCB) production comprises a conveyor mechanism, a curing system, and a computer. The conveyor mechanism is configured to convey a series of selective adhesion blanks, wherein each selective adhesion blank is utilized to produce a PCB and includes a flexible film, a substrate, a conductive layer, and a curable adhesive. The conductive layer is formed from electrically conductive material and adhered to the substrate. The curable adhesive is positioned between the flexible film and the conductive layer and is configured to selectively bond with the conductive layer when the curable adhesive is cured. The curing system is configured to cure the curable adhesive. The computer includes a processing element configured or programmed to: receive a plurality of PCB designs, and direct the curing system to cure the curable adhesive of a plurality of selective adhesion blanks for each PCB design.Type: ApplicationFiled: September 1, 2022Publication date: March 9, 2023Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
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Patent number: 11439023Abstract: A system for providing selective adhesion printed circuit board (PCB) production comprises a conveyor mechanism, a curing system, and a computer. The conveyor mechanism is configured to convey a series of selective adhesion blanks, wherein each selective adhesion blank is utilized to produce a PCB and includes a flexible film, a substrate, a conductive layer, and a curable adhesive. The conductive layer is formed from electrically conductive material and adhered to the substrate. The curable adhesive is positioned between the flexible film and the conductive layer and is configured to selectively bond with the conductive layer when the curable adhesive is cured. The curing system is configured to cure the curable adhesive. The computer includes a processing element configured or programmed to: receive a plurality of PCB designs, and direct the curing system to cure the curable adhesive of a plurality of selective adhesion blanks for each PCB design.Type: GrantFiled: March 12, 2020Date of Patent: September 6, 2022Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
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Publication number: 20220279653Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: ApplicationFiled: April 28, 2022Publication date: September 1, 2022Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Patent number: 11350524Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: GrantFiled: October 12, 2020Date of Patent: May 31, 2022Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Patent number: 11325450Abstract: In one aspect, a baggage door is provided for a vehicle. The baggage door includes a plastic outer panel for closing an opening of a vehicle and a hinge base configured to be mounted to a surface adjacent the opening. The baggage door further includes a plastic inner support having a hinge portion of the plastic inner support configured to pivotally connect to the hinge base. The inner support includes an arm portion extending away from the hinge portion for supporting the outer panel.Type: GrantFiled: March 24, 2020Date of Patent: May 10, 2022Assignee: Consolidated Metco, Inc.Inventors: Joseph Rozanek, Christopher Davis, Kyle Larsen, Stephen McGarry
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Patent number: 11197401Abstract: A method for the large-scale production of PCBs including a continuous selective adhesion process for creating printed circuit traces providing input to a production line. A roll of printed circuit traces is produced using rolls of flexible substrate, conductive layer, and conductive layer support by applying adhesive between the rolls of flexible substrate and conductive layer, bringing the rolls together, transferring a circuit pattern onto the flexible substrate, curing the adhesive through non-opaque areas of the circuit pattern, and separating the non-bonded areas. The resulting printed circuit traces are applied from the roll to mounts, and circuit components are applied from a roll to the traces as the mounts move along the line. Additional rolls of printed circuit traces and circuit components may be incorporated, and multi-layer PCBs may be produced. As part of the production line, the finished PCBs may be applied to flat or contoured products.Type: GrantFiled: January 22, 2019Date of Patent: December 7, 2021Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
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Patent number: 11134456Abstract: A computer-implemented method for synchronizing wireless testing devices includes (a) in a protocol analyzer located in an RF-isolated test chamber, capturing first network packets transmitted to or from a wireless device-under-test (DUT) to generate protocol test data, (b) in the protocol analyzer, determining if any of the first network packets satisfy a trigger rule, (c) in the protocol analyzer, generating a trigger output signal when the trigger rule is satisfied, (d) sending the trigger output signal from the protocol analyzer to an RF analyzer in electrical communication with the DUT, (e) capturing second network packets with the RF analyzer based on the trigger output signal to generate RF test data, the second network packets transmitted to or from the DUT, and (f) in the protocol analyzer, time-aligning the first and second network packets in the protocol test data and the RF test data, respectively.Type: GrantFiled: July 18, 2019Date of Patent: September 28, 2021Assignee: Octoscope Inc.Inventors: Michael Haley, Andrew Stephen McGarry, Ron Cook
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Publication number: 20210289633Abstract: A system for providing selective adhesion printed circuit board (PCB) production comprises a conveyor mechanism, a curing system, and a computer. The conveyor mechanism is configured to convey a series of selective adhesion blanks, wherein each selective adhesion blank is utilized to produce a PCB and includes a flexible film, a substrate, a conductive layer, and a curable adhesive. The conductive layer is formed from electrically conductive material and adhered to the substrate. The curable adhesive is positioned between the flexible film and the conductive layer and is configured to selectively bond with the conductive layer when the curable adhesive is cured. The curing system is configured to cure the curable adhesive. The computer includes a processing element configured or programmed to: receive a plurality of PCB designs, and direct the curing system to cure the curable adhesive of a plurality of selective adhesion blanks for each PCB design.Type: ApplicationFiled: March 12, 2020Publication date: September 16, 2021Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
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Patent number: 11019730Abstract: An electrical contact assembly includes an electrically nonconductive base, a first electrical contact supported by the base and a second electrical contact supported by the base such that the first contact and the second contact are separated by a space. The first electrical contact is configured to engage a first external conductive circuit element and the a second electrical contact is configured to engage a second external conductive circuit element. The first contact and the second contact are configured such that a portion of the first contact and a portion of the second contact converge as the base moves in a first direction relative to the first and second external conductive circuit elements and diverge as the base moves in a second direction relative to the first and second external conductive circuit elements.Type: GrantFiled: May 8, 2019Date of Patent: May 25, 2021Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventor: Stephen McGarry Hatch
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Publication number: 20210092839Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: ApplicationFiled: October 12, 2020Publication date: March 25, 2021Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Publication number: 20200367358Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.Type: ApplicationFiled: May 13, 2019Publication date: November 19, 2020Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Publication number: 20200307362Abstract: In one aspect, a baggage door is provided for a vehicle. The baggage door includes a plastic outer panel for closing an opening of a vehicle and a hinge base configured to be mounted to a surface adjacent the opening. The baggage door further includes a plastic inner support having a hinge portion of the plastic inner support configured to pivotally connect to the hinge base. The inner support includes an arm portion extending away from the hinge portion for supporting the outer panel.Type: ApplicationFiled: March 24, 2020Publication date: October 1, 2020Inventors: Joseph Rozanek, Christopher Davis, Kyle Larsen, Stephen McGarry
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Patent number: 10743419Abstract: A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.Type: GrantFiled: December 27, 2019Date of Patent: August 11, 2020Assignee: Honeywell Federal Manufacturing & Technologies, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Publication number: 20200236827Abstract: A system and method for the large-scale production of PCBs including a continuous selective adhesion process for creating printed circuit traces providing input to a production line. A roll of printed circuit traces is produced using rolls of flexible substrate, conductive layer, and conductive layer support by applying adhesive between the rolls of flexible substrate and conductive layer, bringing the rolls together, transferring a circuit pattern onto the flexible substrate, curing the adhesive through non-opaque areas of the circuit pattern, and separating the non-bonded areas. The resulting printed circuit traces are applied from the roll to mounts, and circuit components are applied from a roll to the traces as the mounts move along the line. Additional rolls of printed circuit traces and circuit components may be incorporated, and multilayer PCBs may be produced. As part of the production line, the finished PCBs may be applied to flat or contoured products.Type: ApplicationFiled: January 22, 2019Publication date: July 23, 2020Applicant: HONEYWELL FEDERAL MANUFACTURING & TECHNOLOGIES, LLCInventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
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Publication number: 20200236788Abstract: A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.Type: ApplicationFiled: December 27, 2019Publication date: July 23, 2020Applicant: HONEYWELL FEDERAL MANUFACTURING & TECHNOLOGIES, LLCInventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
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Publication number: 20200029286Abstract: A computer-implemented method for synchronizing wireless testing devices includes (a) in a protocol analyzer located in an RF-isolated test chamber, capturing first network packets transmitted to or from a wireless device-under-test (DUT) to generate protocol test data, (b) in the protocol analyzer, determining if any of the first network packets satisfy a trigger rule, (c) in the protocol analyzer, generating a trigger output signal when the trigger rule is satisfied, (d) sending the trigger output signal from the protocol analyzer to an RF analyzer in electrical communication with the DUT, (e) capturing second network packets with the RF analyzer based on the trigger output signal to generate RF test data, the second network packets transmitted to or from the DUT, and (f) in the protocol analyzer, time-aligning the first and second network packets in the protocol test data and the RF test data, respectively.Type: ApplicationFiled: July 18, 2019Publication date: January 23, 2020Inventors: Michael Haley, Andrew Stephen McGarry, Ron Cook