Abstract: A system and method for creating shareable Internet-based advertisements includes an administration console receiving data related to an Internet-based advertisement, and configuring an overlay to provide on top of the Internet-based advertisement. A database operatively connected to the administration console stores data and code related to the overlay and the Internet-based advertisement. A share tag is applied to the Internet-based advertisement. Upon activation of the share tag, a share tag server retrieves the stored data and code and displays the overlay on the Internet-based advertisement as an expanded share tag. Upon activation of a share feature on the expanded share tag, the share tag server provides, to a desired social media network server, the stored data needed to display the Internet-based advertisement on the user's social media network page. The Internet-based advertisement is displayed on the user's social media network page, and may be further shared by others.

Abstract: Computer-implemented methods of processing contact records are provided. A user may merge and unmerge contact records to control which records are synchronized with each other. Identity claims of records may be compared to identify possible duplicate records. Identity claims may include addresses, phone numbers, instant messenger addresses or other contact data that is likely to be uniquely associated with a contact. When possible duplicate contact records are found, a dialog box is displayed that identifies the possible duplicate records and includes an option for merging the possible duplicate contact records.

Abstract: In some embodiments a passive impedance equalization network for high speed serial links is described. The impedance equalization network includes at least one stepped impedance transformer near points of impedance discontinuities. The impedance discontinuities may be at an interface connection between two circuit boards. The impedance discontinuities on a circuit board may be at a die-package interface and/or a package-board interface. The stepped impedance transformer may be formed in a package trace, a board trace or both. Forming the stepped impedance transformers in the traces requires no modification to existing package/board design methodology or technology. The stepped impedance transformers can provide impedance matching over a range of frequencies. To account for modeling errors in the design of the stepped impedance transformers integrated circuits transmitting data over the serial link may include active circuitry to select an output/input impedance for transmitters/receivers.

Abstract: For one disclosed embodiment, an integrated circuit may comprise an internal transmission line in one or more layers of the integrated circuit. The internal transmission line may be coupled to receive a signal from an external transmission line at a first end of the internal transmission line without use of termination circuitry. The internal transmission line may transmit the signal passively to a second end of the internal transmission line. The integrated circuit may also comprise first circuitry having an input coupled to the internal transmission line at a first location of the internal transmission line to receive the signal and second circuitry having an input coupled to the internal transmission line at a second location of the internal transmission line to receive the signal. The second location may be different from the first location. Other embodiments are also disclosed.

Abstract: A tunable bandpass filter to provide a filtered differential clock signal in response to an input differential clock signal, where an embodiment comprises a transistor pair loaded by tunable loads, and a feedback circuit to tune the tunable loads. In some embodiments, the feedback circuit tunes the loads to maximize a small-signal differential gain. In other embodiments, the feedback circuit tunes the loads to minimize a metric indicative of jitter in the filtered differential clock signal. Other embodiments are described and claimed.

Abstract: Methods and systems of authoring XML using DHTML views and XSLT are described. Various user interfaces can be automatically or semi-automatically provided in a DHTML view that enable a user to interact with the DHTML view. The interfaces, some of which are termed “in document” interfaces, permit a user to interact with a DHTML view and have those interactions automatically made to a corresponding XML document that describes data that is associated with the DHTML view.

Abstract: In some embodiments disclosed herein, equalizers in a receiver are adapted during normal operation, as they extract bit data from a received bit stream, to account for channel and/or circuit fluctuations.

Abstract: A method, system, and program product is provided for configuring a target device, the method comprising the steps of: receiving a log-in request to connect the target device to a host, wherein the log-in request includes a host designator; accessing a table of host designators and associated O/S types; determining if there is a match of the log-in request host designator to a host designator in the table; and selecting an O/S type protocol associated with the match to the host designator. In a preferred embodiment of the present invention, the host designator is a worldwide name. In a further embodiment of the present invention, the step is provided of determining if a mode parameter is set for a default O/S protocol; and selecting that default O/S protocol unless there is a match of the log-in request host designator in the table.

Abstract: Aspects of the present invention identify duplicate entries across multiple sources of information, such as databases. Further aspects of the invention relate to auto-suggesting entries as duplicates. Embodiments of the invention relate to an algorithm constructed to match or discard duplicates based upon information relating to at least two social identities in one store. Further embodiments of the invention relate to an algorithm constructed to match or discard duplicate entries based upon a legal and/or digital identity. This can be in conjunction with information relating to social identity.

Abstract: A global clock recovery circuit and port circuit determine and combine static phase adjustment information and dynamic phase adjustment information for multiple data signals. Static phase adjustment information is determined for each of the multiple data signals, and dynamic phase adjustment information is determined in common for the multiple data signals.

Abstract: In some embodiments, the invention involves a system having a first group of integrated circuits connected in a truncated ring fashion, wherein the truncated ring includes a truncated region to allow for additional integrated circuits to be added to the ring. In some embodiments, the invention involves a system having a group of integrated circuits connected in a pseudo ring fashion, wherein the pseudo ring is created by data flow of bi-directional signaling between the integrated circuits. In some embodiments, the invention involves a system having a group of integrated circuits connected in a pseudo differential arrangement in which multiple conductors carrying signals share a common reference signal conductor.

Abstract: A method of merging contact information. A method of merging contact information received from multiple sources comprising the acts of identifying a first data record including a first information content as representing a contact, identifying a second data record, having a second information content differing from the first data record, and representing the contact, and merging the first data record and the second data record into a single contact record.

Abstract: A method and apparatus for providing an active standby control system comprising the steps of providing a first and second programmable logic controller (PLC), each controller having an operating state. Each controller further including a network module board operably connected to a network; a control unit, a remote I/O head; and, a hot standby module, each hot standby module is operably connected together. Operably connecting each programmable logic controller to a network. Assigning a network address identifier, i.e., Internet Protocol or Media Access Control address, to each programmable logic controller and sensing the operating state of each programmable logic controller. The network address identifier of each programmable logic controller is determined by the operating state of each respective programmable logic controller.

Abstract: In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value and during the other adaptation mode the adaptive filter is updated only when the received sample is a second binary value. Each adaptation mode provides a set of filter weights, and these two sets of filter weights are averaged to provide an adapted set of filter weights. The use of two adaptation mode allows for a clock boundary in which the digital portion of the filter operates at a lower clock rate than the analog portion. In other embodiments, a filter architecture is described for providing the algebraic signs of the received data samples, important for sign-sign least means square filtering algorithms. In other embodiments, a filter architecture is described in which efficient use is made of voltage-to-current converters so as to achieve a high throughput rate during filtering.

Abstract: In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value and during the other adaptation mode the adaptive filter is updated only when the received sample is a second binary value. Each adaptation mode provides a set of filter weights, and these two sets of filter weights are averaged to provide an adapted set of filter weights. The use of two adaptation mode allows for a clock boundary in which the digital portion of the filter operates at a lower clock rate than the analog portion. In other embodiments, a filter architecture is described for providing the algebraic signs of the received data samples, important for sign-sign least means square filtering algorithms. In other embodiments, a filter architecture is described in which efficient use is made of voltage-to-current converters so as to achieve a high throughput rate during filtering.

Abstract: In some embodiments, a chip includes a chip interface to accept a delay control signal from outside the chip. The chip also includes a controllable delay line to delay an input signal responsive to the delay control signal to provide an output signal with a particular phase relationship to the input signal. Other embodiments are described and claimed.

Abstract: A memory device having memory cells supplied with a separate higher voltage power than the separate power supplied to memory logic, and a lower power state that entails removing power from at least some of the logic such that refresh operations to preserve the contents of the memory cells continue to take place, but at least some of the interface to the memory device is powered down to reduce power consumption.

Abstract: In some embodiments, a chip includes first and second ports to provide first and second received data signals and first and second received strobe signal, respectively. An internal clock signal has a fixed phase relationship to the first received strobe signal and the second received strobe signal has an arbitrary phase relationship with the internal clock signal. First and second write blocks latch the first and second received data signals synchronously with the first and second received strobe signals, respectively. Other embodiments are described and claimed.

Abstract: An integrated circuit is provided that includes a first port to receive a first signal from a first channel and a first device coupled to the first port to modify a channel response of the first signal received from the first channel. A waveform capture device may be coupled to the first device to capture a waveform of a signal modified by the first device.

Abstract: Computer-implemented methods of processing contact records are provided. A user may merge and unmerge contact records to control which records are synchronized with each other. Identity claims of records may be compared to identify possible duplicate records. Identity claims may include addresses, phone numbers, instant messenger addresses or other contact data that is likely to be uniquely associated with a contact. When possible duplicate contact records are found, a dialog box is displayed that identifies the possible duplicate records and includes an option for merging the possible duplicate contact records.