Abstract: A semiconductor package for protecting a semiconductor chip such as a Very Large Scale Integration chip and connecting it to an electrical circuit is disclosed. The chip is bonded to a section of Tape Automated Bonding, (TAB), tape which contains a number of leads thereover, each lead has an inner lead section bonded to the chip and an outer lead section that extends beyond the outer perimeter of the tape, for connecting to the circuit. The chip is enclosed in a housing which subtends an area slightly larger than the chip itself. The inner lead sections project from the TAB tape into the housing and are bonded to the chip. A metal layer under the TAB tape is connected to a number of the leads. After the semiconductor package of this invention is assembled, the outer leads are attached to the associated circuit so as to connect the chip to the circuit. The metal layer serves as a reference plane so the leads connected thereto supply a voltage that does not very to sub-circuits on the chip.

Abstract: A package for housing fabricated semiconductor chips is disclosed. The package has ceramic base with a raised outer shelf extending around its periphery. The outer shelf defines a space in the package where the chip is seated. A lead frame with a number of individual conductive leads is disposed over the outer shelf. A section of tape automated bonding tape is used to provide electrical connections between bonding points on the chip and the lead frame leads; the tape automated bonding tape carries a number of conductive leads each of said leads having an inner lead portion attached to a chip bonding point, and an outer lead portion attached to a lead frame lead. A frame is secured over the base outer shelf so the lead frame is embedded therebetween. A lid is secured over the frame to completely enclose the chip within the package.