Patents by Inventor Stephen P. Morse

Stephen P. Morse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6854085
    Abstract: A system and method for filling in a field of a form includes a network access facility and a mapping facility. Specifically, the network access facility accesses a network in order to receive the form, and the mapping facility maps the field of the form to a predetermined value. For example, the network may be the Internet or the World Wide Web.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: February 8, 2005
    Assignee: Netscape Communicatons Corporation
    Inventor: Stephen P. Morse
  • Patent number: 4449184
    Abstract: The addressable memory space within the retrievable capacity of the microprocessor is necessarily limited by the bit length of the address word. This in turn, is limited by the bit length of the word which the microprocessor may compute or manipulate. By appropriate organization of multiple registers, an extended or expanded memory space may be achieved without the necessity of increasing the word length of the digital information manipulated by the microprocessor. In addition, the microprocessor can be fabricated to be capable of both eight bit and sixteen bit operation by appropriate organization and coordination of a plurality of register files. By virtue of this register file organization and coordination additional improved operations may be achieved, such as direct coupling by the microprocessor between the memory and separate dedicated data processing chips, simplified string instructions and the condensation of entire classes of instructions into single generic instruction formats.
    Type: Grant
    Filed: November 18, 1981
    Date of Patent: May 15, 1984
    Assignee: Intel Corporation
    Inventors: William Pohlman, III, Bruce W. Ravenel, III, James F. McKevitt, III, Stephen P. Morse
  • Patent number: 4363091
    Abstract: The addressable memory space within the retrievable capacity of the microprocessor is necessarily limited by the bit length of the address word. This in turn, is limited by the bit length of the word which the microprocessor may compute or manipulate. By appropriate organization of multiple registers, an extended or expanded memory space may be achieved without the necessity of increasing the word length of the digital information manipulated by the microprocessor. In addition, the microprocessor can be fabricated to be capable of both eight bit and sixteen bit operation by appropriate organization and coordination of a plurality of register files. By virtue of this register file organization and coordination additional improved operations may be achieved, such as direct coupling by the microprocessor between the memory and separate dedicated data processing chips, simplified string instructions and the condensation of entire classes of instructions into single generic instruction formats.
    Type: Grant
    Filed: January 31, 1978
    Date of Patent: December 7, 1982
    Assignee: Intel Corporation
    Inventors: William B. Pohlman, III, Bruce W. Ravenel, III, James F. McKevitt, III, Stephen P. Morse