Abstract: A digital communication system for transmitting and receiving video data signals and control data signals over a transmission line comprises an open-loop equalizer circuit and a control data extension circuit. The open-loop equalizer circuit is operable to receive video signals transmitted over the transmission line and output equalized video data signals. The control data extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the control data signal, and clamp the receive end of the transmission line during a negative transition of the control data signal.

Abstract: A stringed instrument and preamplifier combination where the preamplifier simulates the sound of analog tube amplifiers, and contains only solid state active devices. The preamplifier uses a diode branch with the diode biased into its forward active region and as a non-linear resistive element to provide signal-modulated gain on the operational amplifier gain stage. An alternative embodiment supplements the diode branch with series and parallel resistors as additional design optimization parameters. Another alternative embodiment adds symmetrical output clipping diodes to simulate a vacuum tube push-pull output independently of the diode branch.

Abstract: An extender circuit for handling a communication signal transmitted over a transmission line includes a voltage clamp and a current booster circuit. The voltage clamp is connected to a receive end of the transmission line and is operable to clamp a reflection signal caused by the communication signal received at the receive end of the transmission line. The current booster circuit is connected to the receive end of the transmission line and is operable to provide a boost current at the receive end of the transmission line during a positive transition of the communication signal.

Abstract: A digital communication system for transmitting and receiving Digital Visual Interface (DVI) communication data signals and Display Data Channel (DDC) communication signals over a transmission line comprises an open-loop equalizer circuit and a DDC extension circuit. The open-loop equalizer circuit is operable to receive DVI communication signals transmitted over the transmission line and output equalized DVI communication data signals. The DDC extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the DDC communication signal, and clamp the receive end of the transmission line during a negative transition of the DDC communication signal.

Abstract: An equalizer circuit for equalizing first and second differential input signals comprises a differential pair, a reactive load, and first and second input followers. The differential pair defines first and second input nodes and first and second output nodes, and the reactive load is coupled to the differential pair. The first input follower circuit is connected to the first input node of the differential pair and is operable to receive the first differential input signal and to receive a first feedback signal from the differential pair and in response to generate a first input signal at the first input node of the differential pair. The second input follower circuit is connected to the second input node of the differential pair and is operable to receive the second differential input signal and to receive a second feedback signal from the differential pair and in response to generate a second input signal at the second input node of the differential pair.

Abstract: A digital communication system for transmitting and receiving Digital Visual Interface (DVI) communication data signals and Display Data Channel (DDC) communication signals over a transmission line comprises an open-loop equalizer circuit and a DDC extension circuit. The open-loop equalizer circuit is operable to receive DVI communication signals transmitted over the transmission line and output equalized DVI communication data signals. The DDC extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the DDC communication signal, and clamp the receive end of the transmission line during a negative transition of the DDC communication signal.

Abstract: An extender circuit for handling a communication signal transmitted over a transmission line includes a voltage clamp and a current booster circuit. The voltage clamp is connected to a receive end of the transmission line and is operable to clamp a reflection signal caused by the communication signal received at the receive end of the transmission line. The current booster circuit is connected to the receive end of the transmission line and is operable to provide a boost current at the receive end of the transmission line during a positive transition of the communication signal.

Abstract: An equalizer circuit for equalizing first and second differential input signals comprises a differential pair, a reactive load, and first and second input followers. The differential pair defines first and second input nodes and first and second output nodes, and the reactive load is coupled to the differential pair. The first input follower circuit is connected to the first input node of the differential pair and is operable to receive the first differential input signal and to receive a first feedback signal from the differential pair and in response to generate a first input signal at the first input node of the differential pair. The second input follower circuit is connected to the second input node of the differential pair and is operable to receive the second differential input signal and to receive a second feedback signal from the differential pair and in response to generate a second input signal at the second input node of the differential pair.

Abstract: The improved operational amplifier stages are an input, a gain and an output stage. The input stage has a differential buffer amplifier connected to a transconductance section for converting a differential voltage signal to a current signal. The input stage is operable within a range of differential voltage signals, the range including common mode voltage signals at or beyond the negative supply rail. The gain stage has two cascaded transistors. The base of the first transistor is connected to the emitter of the second transistor through an integrating capacitor. The capacitor is further connected through a resistor to the negative supply rail. The output stage has a driving amplifier and two common emitter output transistors. One output transistor is driven by the amplifier through two current mirrors, the output of the second current mirror being compared to a reference current source. The other output transistor is driven directly by the amplifier.

Abstract: A digital communication system for transmitting and receiving Digital Visual Interface (DVI) communication data signals and Display Data Channel (DDC) communication signals over a transmission line comprises an open-loop equalizer circuit and a DDC extension circuit. The open-loop equalizer circuit is operable to receive DVI communication signals transmitted over the transmission line and output equalized DVI communication data signals. The DDC extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the DDC communication signal, and clamp the receive end of the transmission line during a negative transition of the DDC communication signal.