Patents by Inventor Stephen R. Burrow
Stephen R. Burrow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8032795Abstract: A method for diagnosing communications includes sending a message from a sending node to a receiving node. The sending node detects an error in the receiving node receiving the message. A force log request is sent from the sending node to the receiving node, the force log request including a request for the receiving node to log information. A force log response is received from the receiving node at the sending node, the force log response including the logged information. The sending node diagnoses the communications error in response to the force log response.Type: GrantFiled: February 12, 2008Date of Patent: October 4, 2011Assignee: International Business Machines CorporationInventors: Stephen R. Burrow, Albert Ing, Gregory F. Pfister, Patrick J. Sugrue
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Patent number: 8009589Abstract: A computer program product for subnet management in virtual host channel adapter topologies includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a request to add a new logical host channel adapter (HCA) to the subnet, updating a logical switch port topology control block to reflect a pointer to the new logical HCA, and updating a port topology control block of the logical HCA to reflect a pointer to the logical switch port.Type: GrantFiled: February 25, 2008Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Stephen R. Burrow, Richard K. Errickson
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Patent number: 7949721Abstract: A computer program product for subnet management discovery of point-to-point network topologies includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes discovering a local portion of a subnet representing the point-to-point network, the discovering facilitated by a coupling subnet manager configured to act as a master subnet manager on the local portion of the subnet, interpreting a state of a physical port associated with the coupling subnet manager, and discovering a remote portion of the subnet physically connected to the physical port based on the interpreting.Type: GrantFiled: February 25, 2008Date of Patent: May 24, 2011Assignee: International Business Machines CorporationInventors: Stephen R. Burrow, Alan Monarchi
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Publication number: 20090216853Abstract: A computer program product for subnet management discovery of point-to-point network topologies includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes discovering a local portion of a subnet representing the point-to-point network, the discovering facilitated by a coupling subnet manager configured to act as a master subnet manager on the local portion of the subnet, interpreting a state of a physical port associated with the coupling subnet manager, and discovering a remote portion of the subnet physically connected to the physical port based on the interpreting.Type: ApplicationFiled: February 25, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen R. Burrow, Alan Monarchi
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Publication number: 20090213753Abstract: A computer program product for subnet management in virtual host channel adapter topologies includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a request to add a new logical host channel adapter (HCA) to the subnet, updating a logical switch port topology control block to reflect a pointer to the new logical HCA, and updating a port topology control block of the logical HCA to reflect a pointer to the logical switch port.Type: ApplicationFiled: February 25, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen R. Burrow, Richard K. Errickson
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Publication number: 20090204875Abstract: A method for diagnosing communications includes sending a message from a sending node to a receiving node. The sending node detects an error in the receiving node receiving the message. A force log request is sent from the sending node to the receiving node, the force log request including a request for the receiving node to log information. A force log response is received from the receiving node at the sending node, the force log response including the logged information. The sending node diagnoses the communications error in response to the force log response.Type: ApplicationFiled: February 12, 2008Publication date: August 13, 2009Applicant: INTERNATIONAL BUSINESS MACHINE CORPORATIONInventors: Stephen R. Burrow, Albert Ing, Gregory F. Pfister, Patrick J. Sugrue
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Patent number: 6961876Abstract: A method and system for I/O adapters that must rely on a central processor to handle all inbound link events to reduce the number of events signaled to the central processor with hardware state machines that sort out the significant link events and automatically generate the appropriate response on the outbound link thereby greatly reducing the central processor utilization. As optical links fail (unplugging the link is a failure) or when receiving multiple continuous sequences, numerous events must be filtered by the hardware state machines to limit the number of interrupts presented to the central processor.Type: GrantFiled: September 21, 2001Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue
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Patent number: 6889270Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.Type: GrantFiled: March 15, 2004Date of Patent: May 3, 2005Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue
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Publication number: 20040177178Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.Type: ApplicationFiled: March 15, 2004Publication date: September 9, 2004Applicant: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue
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Patent number: 6775723Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.Type: GrantFiled: September 21, 2001Date of Patent: August 10, 2004Assignee: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue
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Publication number: 20030061377Abstract: A method and system for I/O adapters that must rely on a central processor to handle all inbound link events to reduce the number of events signaled to the central processor with hardware state machines that sort out the significant link events and automatically generate the appropriate response on the outbound link thereby greatly reducing the central processor utilization. As optical links fail (unplugging the link is a failure) or when receiving multiple continuous sequences, numerous events must be filtered by the hardware state machines to limit the number of interrupts presented to the central processor.Type: ApplicationFiled: September 21, 2001Publication date: March 27, 2003Applicant: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue
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Publication number: 20030061418Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.Type: ApplicationFiled: September 21, 2001Publication date: March 27, 2003Applicant: International Business Machines CorporationInventors: Thomas A. Gregg, Stephen R. Burrow, Kulwant M. Pandey, Patrick J. Sugrue