Abstract: A system is disclosed for providing communication across a wireless network. The system includes a transmitter transmitting a modulated signal across a radio channel, wherein the transmitter includes first input means for receiving a primary data signal to be transmitted, second input means for receiving a secondary data signal to be transmitted, a combiner associated with the first and second input means for combining the primary and secondary data signals, and a modulator receiving the combined primary and secondary data signals from the combiner and sequentially developing a modulated signal including a string of phase values with each phase value containing information relative to both the primary and secondary data signals. The system also includes a receiver for receiving the modulated signal, wherein the receiver includes means for separating the received modulated signal into primary and secondary phase values representative of the primary and secondary data signals.

Abstract: A method for increasing data rates within a modulated signal is disclosed. Initially, a first and second bit streams are interleaved together to form an interleaved output bit stream. The interleaved output bit stream is modulated in a manner such that upon demodulation of the interleaved output bit stream according to an FSK modulation scheme only the first bit stream is recovered, and upon demodulation of the interleaved output bit stream according to a second modulation scheme, both the first and second bit streams are recovered.

Abstract: A transmitter/receiver basestation processing a plurality of channels in an RF band is disclosed. The transmitters and receivers of the present invention up-convert or down-convert the RF band as a whole, rather than on a channel-by-channel basis. After up-converting/down-converting to intermediate frequency, the respective channel signals are extracted/combined by means of a plurality of mixed-up or mixed-down base band carriers. The present basestation dramatically improves the efficiencies of the basestation such that the components of the basestation can be integrated on a single chip.

Abstract: In a complex signal receiver, quadrature imbalances in phase angle and amplitude are detected and compensated. A known signal is applied to a quadrature receiver and converted into inphase and quadrature baseband signals. A signal processor determines an imbalance between the inphase and quadrature signals of the known signal and generates one or more correction factors in response to the determined imbalance. The correction factors are applied to subsequently received inphase and quadrature baseband signals to minimize the imbalance between the subsequently received inphase and quadrature baseband signals. The imbalance compensation and correction technique is also useful to quadrature transmitters that employ feedback control. The quadrature imbalance detection and correction circuitry may be integrated on the same integrated circuit chip as the receiver circuitry to provide a single, universal receiver chip.

Abstract: A method for improving linear modulation compensation at the antenna terminals of an RF device in order to react to high voltage standing wave ratio variations is disclosed. In the present RF transmitters, such as portable radios, when transmission voltage standing wave ratio varies such that the linearization of its modulation technique is adversely affected, the dynamic accommodation of the variations in voltage standing wave ratio can be imposed on the output of the RF power amplifier to ensure that linearization is not lost. Specifically, the reverse power signal from the power amplifier can be detected and used to calculate a standing wave control signal. The standing wave control signal is provided to a step attenuator which attenuates the output of the power amplifier in an amount commensurate with the amount of reverse power signal at the output of the power amplifier. By adding attenuation in response to increases in reverse power signal, the linearity of the modulation being used can be controlled.

Abstract: A novel circuit architecture is disclosed for achieving audio, tone, and digital data signal modulation in a full duplex radio transceiver. A single signal source is utilized to generate both transmitted carrier and receiver local oscillator injection signals. Yet the architecture is such that the transmitted data does not appear at the receiver's discriminator output--while a "side tone" of transmitted audio does so appear. The audio to be transmitted is used to frequency modulate a VCO and provide the receiver first mixer injection signal as well as a "carrier" input to a phase modulator. The data/tone signals are on the other hand, combined and integrated in a complex waveform and input to control the phase modulator. The resulting FM (data/tone and voice) output from the phase modulator is then input to a conventional duplexed r.f. transmitter.

Abstract: A circuit is provided which is capable of band switching a voltage controlled oscillator (VCO) while maintaining the relative sensitivity of the voltage controlled device and, hence, the control line voltage itself. The circuit includes an array of capacitors, including a pair of capacitors and a voltage variable capacitor (varactor), a switch, and a tuning coil. When the switch is in the open position, the pair of capacitors are connected in parallel with the varactor. When the switch is closed, the pair of capacitors are connected to ground, arraying themselves on opposite sides of the varactor. In this closed position, the overall capacitance of the tuned circuit increased, thus lowering the tuned frequency of the circuit. Since the switched capacitance (i.e., the capacitance which changes the tuned frequency of the circuit) is arrayed on both sides of the varactor, the varactor maintains its relative sensitivity.

Abstract: Rapid lock or synchronization between a reference oscillator and a voltage controlled oscillator in a phase locked loop circuit is achieved by a synchronizing circuit. The synchronizing circuit senses the magnitude of the ramp signal produced by the phase locked loop circuit, and produces a blocking signal when the ramp signal exceeds a predetermined level. This blocking signal is applied to one of the oscillators to block that one oscillator pulse during the blocking signal, thus moving the two oscillator signals closer together more quickly, and thus providing lock or synchronization more rapidly.

Abstract: A frequency synthesizer utilizing a phased locked loop is provided with input modulating signals for the reference oscillator and for the voltage controlled oscillator. Where the frequency of the reference oscillator must be divided, a time delay circuit between the input modulating signal and the voltage controlled oscillator is provided in order to eliminate or appreciably reduce deviation magnitude responsive distortion with respect to input modulating frequencies.