Patents by Inventor Stephen Su

Stephen Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12634221
    Abstract: Systems and methods are provided for automatically grouping branch devices based on device information (e.g., IPSec tunnel connectivity, etc.). The devices with similar branch gateways which would customarily receive similar route information and/or properties (e.g., AS-PATH, cost, MED, Metric1, Metric2, community/extended community) and/or devices with similar connectivity graphs can be grouped together. This can reduce the number of electronic communications transmitted throughout the network and increase computational efficiency for the controller and devices.
    Type: Grant
    Filed: July 17, 2024
    Date of Patent: May 19, 2026
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dilip Gupta, Harish Magganmane, Stephen Su
  • Publication number: 20240372803
    Abstract: Systems and methods are provided for automatically grouping branch devices based on device information (e.g., IPSec tunnel connectivity, etc.). The devices with similar branch gateways which would customarily receive similar route information and/or properties (e.g., AS-PATH, cost, MED, Metric1, Metric2, community/extended community) and/or devices with similar connectivity graphs can be grouped together. This can reduce the number of electronic communications transmitted throughout the network and increase computational efficiency for the controller and devices.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Dilip Gupta, Harish Magganmane, Stephen Su
  • Patent number: 12058040
    Abstract: Systems and methods are provided for automatically grouping branch devices based on device information (e.g., IPSec tunnel connectivity, etc.). The devices with similar branch gateways which would customarily receive similar route information and/or properties (e.g., AS-PATH, cost, MED, Metric1, Metric2, community/extended community) and/or devices with similar connectivity graphs can be grouped together. This can reduce the number of electronic communications transmitted throughout the network and increase computational efficiency for the controller and devices.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: August 6, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dilip Gupta, Harish Magganmane, Stephen Su
  • Publication number: 20230110199
    Abstract: Systems and methods are provided for automatically grouping branch devices based on device information (e.g., IPSec tunnel connectivity, etc.). The devices with similar branch gateways which would customarily receive similar route information and/or properties (e.g., AS-PATH, cost, MED, Metric1, Metric2, community/extended community) and/or devices with similar connectivity graphs can be grouped together. This can reduce the number of electronic communications transmitted throughout the network and increase computational efficiency for the controller and devices.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 13, 2023
    Inventors: Dilip Gupta, Harish Magganmane, Stephen Su
  • Patent number: 11546257
    Abstract: An example network infrastructure device of a software defined wide area network (SD-WAN) comprises processing circuitry and a memory including instructions that cause the network infrastructure device to advertise a set of SD-WAN overlay tunnels terminating at the network infrastructure device, receive a network connectivity graph including a categorized set of network infrastructure devices that are members of an advertisement area and links between the set of network infrastructure devices, receive data traffic intended for a destination device of the set of network infrastructure devices, determine, based on the network connectivity graph, a preferred path to the destination device, and transmit the data traffic via an interface associated with the preferred path.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: January 3, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dilip Gupta, Harish Magganmane, Stephen Su
  • Patent number: 11463343
    Abstract: Systems and methods of software-defined wide area network (SDWAN) device routing are provided using a cloud-based overlay routing service that utilizes, a cloud-BGP service (CBS), and a path computation module (PCM), and overlay agents (OAs) implemented on the tenant side. The Oas, CBS, and PCM may interact with each other, e.g., publish/update local states, route prefixes, etc. to create/maintain routing in the SDWAN.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: October 4, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Arijit Sarcar, Laxminarayana Tumuluru, Dilip Gupta, Stephen Su, Harish Magganmane, Shijie Ma, Sivaram Dommeti
  • Publication number: 20220109620
    Abstract: Systems and methods of software-defined wide area network (SDWAN) device routing are provided using a cloud-based overlay routing service that utilizes, a cloud-BGP service (CBS), and a path computation module (PCM), and overlay agents (OAs) implemented on the tenant side. The Oas, CBS, and PCM may interact with each other, e.g., publish/update local states, route prefixes, etc. to create/maintain routing in the SDWAN.
    Type: Application
    Filed: October 7, 2020
    Publication date: April 7, 2022
    Inventors: ARIJIT SARCAR, LAXMINARAYANA TUMULURU, DILIP GUPTA, STEPHEN SU, HARISH MAGGANMANE, SHIJIE MA, SIVARAM DOMMETI
  • Patent number: 10567275
    Abstract: In some examples, a computing device comprises a virtual network endpoint; a network interface card (NIC) comprising a first hardware component and a second hardware component, wherein the first hardware component and the second hardware component provide separate packet input/output access to a physical network interface of the NIC, wherein the NIC is configured to receive a packet inbound from the physical network interface; and a virtual router to receive the packet from the NIC and output, using the first hardware component, in response to determining a destination endpoint of the packet is the virtual network endpoint, the packet back to the NIC, wherein the NIC is further configured to switch, in response to receiving the packet from the virtual router, the packet to the virtual network endpoint and to output, using the second hardware component, the packet to the virtual network endpoint.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: February 18, 2020
    Assignee: Juniper Networks, Inc.
    Inventors: Thilak Raj Surendra Babu, Xiao Hu, Stephen Su
  • Publication number: 20190222508
    Abstract: In some examples, a computing device comprises a virtual network endpoint; a network interface card (NIC) comprising a first hardware component and a second hardware component, wherein the first hardware component and the second hardware component provide separate packet input/output access to a physical network interface of the NIC, wherein the NIC is configured to receive a packet inbound from the physical network interface; and a virtual router to receive the packet from the NIC and output, using the first hardware component, in response to determining a destination endpoint of the packet is the virtual network endpoint, the packet back to the NIC, wherein the NIC is further configured to switch, in response to receiving the packet from the virtual router, the packet to the virtual network endpoint and to output, using the second hardware component, the packet to the virtual network endpoint.
    Type: Application
    Filed: March 25, 2019
    Publication date: July 18, 2019
    Inventors: Thilak Raj Surendra Babu, Xiao Hu, Stephen Su
  • Patent number: 10243840
    Abstract: In some examples, a computing device comprises a virtual network endpoint; a network interface card (NIC) comprising a first hardware component and a second hardware component, wherein the first hardware component and the second hardware component provide separate packet input/output access to a physical network interface of the NIC, wherein the NIC is configured to receive a packet inbound from the physical network interface; and a virtual router to receive the packet from the NIC and output, using the first hardware component, in response to determining a destination endpoint of the packet is the virtual network endpoint, the packet back to the NIC, wherein the NIC is further configured to switch, in response to receiving the packet from the virtual router, the packet to the virtual network endpoint and to output, using the second hardware component, the packet to the virtual network endpoint.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: March 26, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Thilak Raj Surendra Babu, Xiao Hu, Stephen Su
  • Publication number: 20180254981
    Abstract: In some examples, a computing device comprises a virtual network endpoint; a network interface card (NIC) comprising a first hardware component and a second hardware component, wherein the first hardware component and the second hardware component provide separate packet input/output access to a physical network interface of the NIC, wherein the NIC is configured to receive a packet inbound from the physical network interface; and a virtual router to receive the packet from the NIC and output, using the first hardware component, in response to determining a destination endpoint of the packet is the virtual network endpoint, the packet back to the NIC, wherein the NIC is further configured to switch, in response to receiving the packet from the virtual router, the packet to the virtual network endpoint and to output, using the second hardware component, the packet to the virtual network endpoint.
    Type: Application
    Filed: March 1, 2017
    Publication date: September 6, 2018
    Inventors: Thilak Raj Surendra Babu, Xiao Hu, Stephen Su
  • Publication number: 20170218028
    Abstract: Provided herein are tandem Fcs and tandem Fc antibodies (“TFcAs”), e.g., tandem Fc bispecific antibodies (“TFcBAs”), which comprise one or at least two binding sites that specifically bind to one or more cell surface receptors. The binding sites are connected through a TFc, which TFc comprises a first Fc region and a second Fc region, wherein the first and the second Fc regions are linked through a TFc linker to form a contiguous polypeptide and dimerize to form an Fc dimer. Exemplary TFcBAs inhibit signal transduction through the cell surface receptor(s) for which the binding sites of the TFcBA are specific.
    Type: Application
    Filed: December 9, 2016
    Publication date: August 3, 2017
    Inventors: Brian HARMS, Neeraj KOHLI, Alexey LUGOVSKOY, Stephen SU, Melissa GEDDIE
  • Publication number: 20170081421
    Abstract: Provided herein are tandem Fcs and tandem Fc antibodies (“TFcAs”), e.g., tandem Fc bispecific antibodies (“TFcBAs”), which comprise one or at least two binding sites that specifically bind to one or more cell surface receptors. The binding sites are connected through a TFc, which TFc comprises a first Fc region and a second Fc region, wherein the first and the second Fc regions are linked through a TFc linker to form a contiguous polypeptide and dimerize to form an Fc dimer. Exemplary TFcBAs bind to the cell surface receptors c-Met and EpCam and inhibit signal transduction through the cell surface receptor(s) for which the binding sites of the TFcBA are specific.
    Type: Application
    Filed: September 30, 2016
    Publication date: March 23, 2017
    Inventors: Brian HARMS, Neeraj KOHLI, Alexey Alexandrovich LUGOVSKOY, Melissa GEDDIE, Eric Mark KRAULAND, William George ROACH, Stephen SU, Adnan ABU-YOUSIF
  • Patent number: 9458245
    Abstract: Provided herein are tandem Fcs and tandem Fc antibodies (“TFcAs”), e.g., tandem Fc bispecific antibodies (“TFcBAs”), which comprise one or at least two binding sites that specifically bind to one or more cell surface receptors. The binding sites are connected through a TFc, which TFc comprises a first Fc region and a second Fc region, wherein the first and the second Fc regions are linked through a TFc linker to form a contiguous polypeptide and dimerize to form an Fc dimer. Exemplary TFcBAs bind to the cell surface receptors c-Met and EpCam and inhibit signal transduction through the cell surface receptor(s) for which the binding sites of the TFcBA are specific.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: October 4, 2016
    Assignee: Merrimack Pharmaceuticals, Inc.
    Inventors: Brian Harms, Neeraj Kohli, Alexey Lugovskoy, Melissa Geddie, Eric Mark Krauland, William George Roach, Stephen Su, Adnan Abu-Yousif
  • Publication number: 20140302035
    Abstract: Provided herein are tandem Fcs and tandem Fc antibodies (“TFcAs”), e.g., tandem Fc bispecific antibodies (“TFcBAs”), which comprise one or at least two binding sites that specifically bind to one or more cell surface receptors. The binding sites are connected through a TFc, which TFc comprises a first Fc region and a second Fc region, wherein the first and the second Fc regions are linked through a TFc linker to form a contiguous polypeptide and dimerize to form an Fc dimer. Exemplary TFcBAs bind to the cell surface receptors c-Met and EpCam and inhibit signal transduction through the cell surface receptor(s) for which the binding sites of the TFcBA are specific.
    Type: Application
    Filed: March 6, 2014
    Publication date: October 9, 2014
    Applicants: ADIMAB, LLC, MERRIMACK PHARMACEUTICALS, INC.
    Inventors: Brian HARMS, Neeraj KOHLI, Alexey LUGOVSKOY, Melissa GEDDIE, Eric Mark KRAULAND, WIlliam George ROACH, Stephen SU, Adnan ABU-YOUSIF
  • Publication number: 20140294834
    Abstract: Provided herein are tandem Fcs and tandem Fc antibodies (“TFcAs”), e.g., tandem Fc bispecific antibodies (“TFcBAs”), which comprise one or at least two binding sites that specifically bind to one or more cell surface receptors. The binding sites are connected through a TFc, which TFc comprises a first Fc region and a second Fc region, wherein the first and the second Fc regions are linked through a TFc linker to form a contiguous polypeptide and dimerize to form an Fc dimer. Exemplary TFcBAs inhibit signal transduction through the cell surface receptor(s) for which the binding sites of the TFcBA are specific.
    Type: Application
    Filed: February 20, 2014
    Publication date: October 2, 2014
    Applicant: MERRIMACK PHARMACEUTICALS, INC.
    Inventors: Brian HARMS, Neeraj KOHLI, Alexey LUGOVSKOY, Stephen SU, Melissa GEDDIE
  • Publication number: 20070124156
    Abstract: Methods, systems, configurations, and computer program products create, represent, and manage Business Object Documents (BODs), coordinating the interfaces between two or more computer systems exchanging transactions thru a messaging architecture. The online validation of a BOD to prevent spoofing is performed by use of a relational database. While some aspects of the invention deal with the general e-business exchange of documents, others add versioning and verification to transactions via a repository that is used for that purpose. The repository is also used for the management of design of the electronic documents during the creations of the system between systems. Thru the use of a relational database business object document verification by relational repository (BODVRR) is able to perform automated validation of a versioned BOD in a business environment.
    Type: Application
    Filed: January 30, 2006
    Publication date: May 31, 2007
    Inventors: Jeff Rice, Stephen Su, Thomas Renfert, Christina Hershberger
  • Patent number: 5327016
    Abstract: A control circuit for switching AC or DC loads and for automatically discerning the presence of an AC or a DC power supply via a switch has been provided. The control circuit is coupled to alternately render a switch operative and non-operative wherein the switch is coupled across a load which is powered up by either an AC or a DC power supply. The control circuit includes an AC/DC discernment circuit for ascertaining whether the load is powered up by an AC or a DC power supply. The control circuit also includes circuitry for comparing signals sensed by the switch with predetermined thresholds (which are a function of whether an AC or DC determination has been made) for providing logic signals to control the operation of the switch.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: July 5, 1994
    Assignee: Motorola, Inc.
    Inventors: Stephen Su, Warren J. Schultz, Lloyd Hayes
  • Patent number: 5164659
    Abstract: A low impedance load is switched between a power supply source and ground through a series connected power MOSFET the conduction of which is controlled by a switching circuit. The switching circuit includes a linear loop that regulates the switch voltage to a minimum value to produce current flow through the load and the MOSFET. In addition, the switching circuit includes a current supply placed in parallel to the MOSFET which is set to supply a minimum predetermined current that is representative of the value of current flow through the load under an open load condition. If the load current falls below this set current value an open load status flag is provided by the switching circuit as the loop is no longer in regulation.
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: November 17, 1992
    Inventors: Warren Schultz, Stephen Su