Abstract: An integrated circuit (IC) fabricated on a Silicon-On-Insulator (SOI) wafer, having a plurality of impedance elements cascoded in series, each impedance elements having a specified value. A subset of the impedance elements are arranged to bias a first tub at a specified very high voltage (VHV) multiplied by a first predetermined ratio. A further subset of the impedance elements are arranged to bias a second tub at VHV multiplied by a second predetermined ratio and each of the impedance elements are further arranged to bias a handle and a third surrounding tub at VHV multiplied by a third predetermined ratio. A method for designing an integrated circuit using fully dielectrically isolated processes which function reliably at higher operating voltages than that provided by the conventional processes.

Abstract: An integrated circuit (IC) fabricated on a Silicon-On-Insulator (SOI) wafer, having a plurality of impedance elements cascoded in series, each impedance elements having a specified value. A subset of the impedance elements are arranged to bias a first tub at a specified very high voltage (VHV) multiplied by a first predetermined ratio. A further subset of the impedance elements are arranged to bias a second tub at VHV multiplied by a second predetermined ratio and each of the impedance elements are further arranged to bias a handle and a third surrounding tub at VHV multiplied by a third predetermined ratio. A method for designing an integrated circuit using fully dielectrically isolated processes which function reliably at higher operating voltages than that provided by the conventional processes.

Abstract: The signal sensed on a heart pacer electrode is converted by a delta modulator to a sequence of samples of 0 and 1 bit values. The resulting bit sequence is delayed, and the original bit sequence and its delayed version are continuously subtracted from each other in a clocked up/down counter to derive a count. When the count reaches a threshold value, three different recognition logic circuits are triggered and they then operate for two milliseconds. One circuit recognizes a beat if the count does not drop below another, lower threshold value during the timing interval. A second circuit detects a beat if the count remains above the threshold level for at least 50% of the time during the timing interval. The third circuit detects a beat by operating directly on the delta modulator output bit sequence; it checks whether bits of the value indicative of the triggering event predominate over bits of the opposite value during the timing interval.

Abstract: A heart pacer in which the magnitude of the end-of-life test current source is programmable. This effectively allows the physician to program the condition which will control a switch-over to end-of-life operation. It also allows the physician to override end-of-life operation after it initially takes place following a failing of the end-of-life test. The pacer also includes an additional end-of-life test involving the continuous monitoring of the supply potential and a switch-over to end-of-life operation should the pacer powering potential momentarily fall below a threshold level.