Abstract: A direct conversion receiver with an integrated self alignment tuner. The system includes a tank circuit, an analog to digital converter, a digital down converter, a digital up converter, a local oscillator, and a digital to analog converter. The tank circuit receives a radio frequency signal from an antenna input. The analog to digital converter is connected to the tank circuit to digitize the tank output signal and generate a corresponding digital signal. The digital down converter is in communication with the analog to digital converter and generates an intermediate frequency signal based on the digital signal and the output of the local oscillator. The digital up converter is in communication with the digital to analog converter to generate a radio frequency test signal, where the digital to analog converter provides the radio frequency test signal to the antenna input.

Abstract: An ignition control system for controlling ignition knock while maintaining minimum spark for best torque (MBT). Both knock control and MBT control are simultaneously utilized. During knock control, engine cycles are counted between successive knock detections. When the count is less than a first value, a retard signal is generated. An advance signal is generted when the count is greater than a second predetermined value. These retard and advance signals are accumulated as knock trim signals in RAM storage locations as a function of engine speed and load operating points for each cylinder. During MBT control, MBT trim signals are generated by determining convergence of an average difference in indicated mean effective pressure for each cylinder. These MBT trim signals are stored in another RAM as a function of speed and load operating points. Base ignition timing is then corrected by both the knock trim signal and corresponding MBT trim signal at each speed and load operating point.

Abstract: A dual port, random access, read/write memory is provided such that each microprocessor can access shared memory locations without regard to the state of the other microprocessor. Previously known dual port systems use delays, called wait states, or handshaking techniques to control memory acces and to resolve overlapping memory access requests. This invention avoids the need for special timing controls by improving memory response time. Once a valid address is placed on the address bus by the microprocessor, which is recognized by the memory as being within its range of assigned address values, the memory prefetches the data at that address may soon follow. If it does, then the data is placed on the data bus. If it does not, then the prefeteched data is ignored and a write operation takes place for the particular address.