Abstract: A static random access memory (SRAM) is provided for establishing an initialization state. The SRAM connects to a plurality of signal lines including a bit line and an inverse bit line. The SRAM includes first and second inverters, a voltage potential and a ground. The first inverter includes a first n-type metal oxide semiconductor (MOS) transistor having a first n-type threshold voltage and a first p-type MOS transistor having a first p-type threshold voltage. The second inverter includes a second n-type MOS transistor having a second n-type threshold voltage and a second p-type MOS transistor having a second p-type threshold voltage. The first transistors connect respectively first n-type and first p-type drains together at a first junction that connects to the bit line. The second transistors connect respectively a second n-type and second p-type drains together at a second junction that connects to the inverse bit line.