Abstract: In some embodiments, a system and method for mapping the logical chip selects to a physical chip select. A chip select remapping unit receives logical chip select associated with a dual in-line memory module. The chip select remapping unit converts the logical chip select vector through a redirection table that maps the logical memory ranks to available physical memory ranks.

Abstract: Write pointer error recovery systems and methods are provided. A write pointer from a write pointer circuit may cause a demultiplexer circuit to direct data from a memory cell to a desired bit location in a register. A read pointer may cause a multiplexer circuit to select data from a desired bit location in the register to provide as output data or to select one of the bits of the write pointer. The write pointer may be incremented by a data strobe signal. The state of the write pointer may be determined by reading the bits of the write pointer, and the write pointer may be synchronized via a reset line. Other embodiments are also claimed and described.

Abstract: A write pointer (21) from a write pointer circuit (13) may cause a demultiplexer circuit (12) to direct data from a memory cell (11A–11N) to a desired bit location (0–4) in a register 14. A read pointer (20) may cause a multiplexer circuit (15) to select data from a desired bit location in the register to provide as output data (19) or to select one of the bits of the write pointer. The write pointer may be incremented by a data strobe signal (17). The state of the write pointer may be determined by reading the bits of the write pointer, and the write pointer may be synchronized via a reset line (18).