Patents by Inventor Steve Aiken

Steve Aiken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9417655
    Abstract: Generating a clock signal includes: at a root node of a clock distribution network, receiving a first clock signal; at a first leaf node of the clock distribution network, detecting a reference event and generating a synchronizing signal based on the detection of the reference event; passing the synchronizing signal along a synchronizing signal path from the first leaf node to the root node via one or more clocked storage cells, each storage cell being clocked from a corresponding point within the clock distribution network; at the root node, generating a second clock signal from the first clock signal synchronized to the synchronizing signal received at the root node, and distributing the second clock signal to the leaf nodes of the clock distribution network, the generating of the second clock signal resulting in the second clock signal received at the first leaf node being synchronized to the detected reference event.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: August 16, 2016
    Assignee: Cavium, Inc.
    Inventors: Suresh Balasubramanian, Steve Aiken, Georgios Faldamis
  • Patent number: 9411361
    Abstract: Generating a clock signal includes: at a root node of a clock distribution network, receiving a first clock signal generated based on a reference clock signal; at a first leaf node, detecting a reference event associated with the reference clock signal and generating a synchronizing signal; passing the synchronizing signal from the first leaf node to the root node; at the root node, generating a second clock signal from the first clock signal synchronized to the synchronizing signal, and distributing the second clock signal to the leaf nodes. Generating the second clock signal includes selecting a repeating pattern of cycles of the first clock signal including fewer than all of the cycles of the first clock signal, and at least every cycle of the first clock signal that is shifted in time by a propagation delay with respect to a rising edge of the reference clock signal.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: August 9, 2016
    Assignee: Cavium, Inc.
    Inventors: Suresh Balasubramanian, Steve Aiken, Georgios Faldamis
  • Publication number: 20160142067
    Abstract: Generating a clock signal includes: at a root node of a clock distribution network, receiving a first clock signal generated based on a reference clock signal; at a first leaf node, detecting a reference event associated with the reference clock signal and generating a synchronizing signal; passing the synchronizing signal from the first leaf node to the root node; at the root node, generating a second clock signal from the first clock signal synchronized to the synchronizing signal, and distributing the second clock signal to the leaf nodes. Generating the second clock signal includes selecting a repeating pattern of cycles of the first clock signal including fewer than all of the cycles of the first clock signal, and at least every cycle of the first clock signal that is shifted in time by a propagation delay with respect to a rising edge of the reference clock signal.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 19, 2016
    Inventors: Suresh Balasubramanian, Steve Aiken, Georgios Faldamis
  • Publication number: 20160142066
    Abstract: Generating a clock signal includes: at a root node of a clock distribution network, receiving a first clock signal; at a first leaf node of the clock distribution network, detecting a reference event and generating a synchronizing signal based on the detection of the reference event; passing the synchronizing signal along a synchronizing signal path from the first leaf node to the root node via one or more clocked storage cells, each storage cell being clocked from a corresponding point within the clock distribution network; at the root node, generating a second clock signal from the first clock signal synchronized to the synchronizing signal received at the root node, and distributing the second clock signal to the leaf nodes of the clock distribution network, the generating of the second clock signal resulting in the second clock signal received at the first leaf node being synchronized to the detected reference event.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 19, 2016
    Inventors: Suresh Balasubramanian, Steve Aiken, Georgios Faldamis