Patents by Inventor Steve Casper
Steve Casper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8054109Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: April 8, 2011Date of Patent: November 8, 2011Assignee: Round Rock Research, LLCInventors: Timothy B. Cowles, Steve Casper
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Publication number: 20110182130Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: April 8, 2011Publication date: July 28, 2011Applicant: ROUND ROCK RESEARCH, LLCInventors: Timothy B. Cowles, Steve Casper
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Patent number: 7924067Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: February 25, 2010Date of Patent: April 12, 2011Assignee: Round Rock Research, LLCInventors: Timothy B. Cowles, Steve Casper
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Publication number: 20100149897Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: February 25, 2010Publication date: June 17, 2010Inventors: Timothy B. Cowles, Steve Casper
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Patent number: 7696790Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: November 11, 2008Date of Patent: April 13, 2010Assignee: Round Rock Research, LLCInventors: Timothy B. Cowles, Steve Casper
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Publication number: 20090085613Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: November 11, 2008Publication date: April 2, 2009Inventors: Timothy B. Cowles, Steve Casper
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Patent number: 7459944Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: December 6, 2004Date of Patent: December 2, 2008Assignee: Micron Technology, Inc.Inventors: Timothy B. Cowles, Steve Casper
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Patent number: 7327620Abstract: Disclosed herein are exemplary embodiments of an improved differential input buffer for receiving low power signals and associated methods. The disclosed buffer circuit comprises at least one differential amplifier for receiving as inputs an enable signal (e.g., a clock enable signal) and a reference signal, and provides a differential amplifier output representative of a comparison of the magnitude of the input signals. As improved, input buffer circuitry comprises a pull up stage to pull up the voltage of the differential amplifier output slightly higher during an output low condition. The pull up stage is preferably, but not necessarily, activated only during a problematic condition, such as when both input signals to the differential amplifier are low. By pulling up the output, the input buffer circuit enjoys improved margin, and is able to reliably signal a low power condition even when both inputs are low.Type: GrantFiled: June 10, 2004Date of Patent: February 5, 2008Assignee: Mircon Technology, Inc.Inventors: Steve Casper, Scott Van De Graaff
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Patent number: 7236019Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: December 6, 2004Date of Patent: June 26, 2007Assignee: Micron Technology, Inc.Inventors: Timothy B. Cowles, Steve Casper
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Publication number: 20050099842Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: December 6, 2004Publication date: May 12, 2005Inventors: Timothy Cowles, Steve Casper
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Publication number: 20050099843Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: December 6, 2004Publication date: May 12, 2005Inventors: Timothy Cowles, Steve Casper
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Patent number: 6864725Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: GrantFiled: June 5, 2002Date of Patent: March 8, 2005Assignee: Micron Technology, Inc.Inventors: Timothy B. Cowles, Steve Casper
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Patent number: 6731528Abstract: The present invention provides a method and apparatus for writing a programmable conductor random access memory (PCRAM) element. After a read operation of the memory element a complement logical state from that read is written back to the memory element. In one embodiment the memory element is then again written back to its original state. In another embodiment logic circuitry keeps track of whether the original logic state or its complement are stored in the memory element so that during the next read the stored logic will be correctly read.Type: GrantFiled: May 3, 2002Date of Patent: May 4, 2004Assignee: Micron Technology, Inc.Inventors: Glen Hush, Kevin G. Duesman, Steve Casper
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Publication number: 20030227302Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.Type: ApplicationFiled: June 5, 2002Publication date: December 11, 2003Inventors: Timothy B. Cowles, Steve Casper
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Publication number: 20030206433Abstract: The present invention provides a method and apparatus for writing a programmable conductor random access memory (PCRAM) element. After a read operation of the memory element a complement logical state from that read is written back to the memory element. In one embodiment the memory element is then again written back to its original state. In another embodiment logic circuitry keeps track of whether the original logic state or its complement are stored in the memory element so that during the next read the stored logic will be correctly read.Type: ApplicationFiled: May 3, 2002Publication date: November 6, 2003Inventors: Glen Hush, Kevin G. Duesman, Steve Casper
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Patent number: 5150186Abstract: A CMOS integrated circuit output terminal driver subcircuit (60) provides quick response at an output terminal (56) of an integrated circuit (50) while preventing reverse current leakage when an external high voltage, which exceeds the positive internal circuit source voltage of the integrated circuit, is imposed on the output terminal (56). The output driver subcircuit (60) additionally provides an output voltage at the output terminal that is only nominally below the internal circuit source voltage. A p-channel MOS pull-up transistor (62) is operably connected to the output terminal (56) to selectively drive it substantially to the internal circuit source voltage. A leakage prevention device (66), comprising a native n-channel transistor (68) with a low turn-on threshold voltage, is connected in series with the pull-up transistor (62) to prevent output terminal reverse current leakage back through the pull-up transistor (62) when the external high voltage is imposed upon the output terminal (56).Type: GrantFiled: March 6, 1991Date of Patent: September 22, 1992Assignee: Micron Technology, Inc.Inventors: David Pinney, Gary Johnson, Greg Roberts, Steve Casper