Patents by Inventor Steve Chaney

Steve Chaney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7783205
    Abstract: A learning remote “learns” both a digital code carried by an infrared operational signal as well as a timing characteristic (for example, time period) of a carrier used to modulate the operational signal. When the photodiode of the learning remote is close to the transmitter of the remote to be learned from, a low frequency saturation current is superimposed on the intelligence signal. Rather than using a fixed reference voltage to detect when the carrier component of the intelligence signal transitions, an adaptive reference voltage (VAR) is used. A comparator compares a photocurrent voltage to VAR. Because VAR is maintained between the envelope of positive peaks and the envelope of negative peaks of the photocurrent voltage despite changes in the low frequency current, the comparator detects each transition of the carrier component. A microcontroller timer determines the time between transitions output by the comparator and thereby determines the timing characteristic.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: August 24, 2010
    Assignee: Universal Electronics Inc.
    Inventor: Steve Chaney
  • Patent number: 6816349
    Abstract: An integrated power switch is disclosed. The power switch comprises a power transistor for providing an output current. The power transistor includes a grounded body. The power switch includes a sense transistor coupled to the power transistor. The sense transistor includes a floating body. The power switch further includes a resistor coupled to the floating body of the sense transistor. A value of the resistor is chosen such that the output current is regulated at a predetermined level. Accordingly, a power switch in accordance with the present invention includes a power transistor which is implemented with grounded body and its companion sense transistor is implemented with floating body. Higher operating voltages can be achieved by turning on the parasitic transistor inside the sense transistor with a resistor connected from its body to ground. The impact ionization current of the power and sense transistors are included in the current limit loop control.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: November 9, 2004
    Assignee: Micrel, Inc.
    Inventors: Steve Chaney, Bruce Hennig