Abstract: A containment bag assembly for extracting a tissue specimen comprises a bag having one or more segmenting wires, an outer tube comprising a proximal and distal end, a flexible ring configured to form a top opening of the containment bag, wherein the flexible ring comprises two ring subassemblies, each having a proximal and distal end, a flexible member positioned between and coupled to the distal ends of the two ring subassemblies, wherein, when the flexible member is in a collapsed position, the two ring subassemblies are in a collapsed position and the containment bag is configured to be stored within the outer tube, and wherein, when the flexible member is in an expanded position, the two ring subassemblies and the flexible member bias the top opening of the containment bag to an open position to enable placement of the tissue specimen within the containment bag.

Abstract: A tissue segmentation device comprises segmenting wires, a grasper, an introducer tube that is shaped and sized to allow introduction of the segmenting wires and the grasper into a patient incision, a specimen bag configured to be deployed through the introducer tube and into the patient incision, at least one actuator positioned adjacent a proximal end of the introducer tube and coupled to proximal portions of the segmenting wires and the grasper, and wherein the at least one actuator is configured for manipulating the grasper to grasp a tissue specimen prior to or during tissue segmentation, wherein manipulation of the grasper further enables pulling the tissue specimen into the segmenting wires for segmentation, positioning the tissue specimen such that it contacts the segmenting wires, and/or enabling placement of the tissue specimen in the bag.

Abstract: An endovascular treatment system includes a delivery sleeve that is insertable into an intravascular catheter. A therapeutic device is housed coaxially within the delivery sleeve and both are advanced within the catheter in combination. An advancement mechanism is connected to the therapeutic device to advance the therapeutic device out of the delivery sleeve and into a patient. The delivery sleeve includes a stop positioned on the proximal end. The stop contacts the proximal end of the catheter, limiting the distance the delivery sleeve is inserted into a catheter.

Abstract: An endovascular treatment system includes a delivery sleeve that is insertable into an intravascular catheter. A therapeutic device is housed coaxially within the delivery sleeve and both are advanced within the catheter in combination. An advancement mechanism is connected to the therapeutic device to advance the therapeutic device out of the delivery sleeve and into a patient. The delivery sleeve includes a stop positioned on the proximal end. The stop contacts the proximal end of the catheter, limiting the distance the delivery sleeve is inserted into a catheter.

Abstract: Apparatuses and techniques are described for providing a positive voltage source and a negative voltage source in a circuit. The positive voltage source and the negative voltage source have a common ground node. The positive voltage source can be provided using a current mirror in which a current in a first path is copied to provide a current in a second path. The currents of the first and second paths are sunk at the common ground node. The negative voltage source can be provided using a current mirror in which a current in a third path is copied to provide a current in a fourth path, where the current of the fourth path is sourced at the common ground node.

Abstract: Apparatuses and techniques are described for calibrating a negative voltage source. A ground voltage is applied to a multi-stage amplifier from the negative voltage source while an offset voltage measurement (OVM) is made at the output of the multi-stage amplifier. The OVM is recorded and subsequently used by a calibration circuit when the negative voltage source applies a range of negative voltages to the input of the multiple stage amplifier. The calibration circuit subtracts the OVM from measurements obtained at the output of the multi-stage amplifier to obtain corrected measurements, and uses the corrected measurements to calibrate the negative voltage source, e.g., by adjusting a relationship between digital values input to the negative voltage source and the output voltages.

Abstract: An endovascular treatment system includes a delivery sleeve that is insertable into an intravascular catheter. A therapeutic device is housed coaxially within the delivery sleeve and both are advanced within the catheter in combination. An advancement mechanism is connected to the therapeutic device to advance the therapeutic device out of the delivery sleeve and into a patient. The delivery sleeve includes a stop positioned on the proximal end. The stop contacts the proximal end of the catheter, limiting the distance the delivery sleeve is inserted into a catheter.

Abstract: A memory system includes a leakage current detection circuit to detect for leakage current flowing in a bias line, such as due to a short or a breakdown of dielectric. A leakage sense circuit senses the leakage current, and generates a common mode voltage in response to the sensing. A tracking circuit tracks the common mode voltage, and a leakage current measurement circuit measures the leakage current based on the common mode voltage tracking. The leakage current detection circuit may be an on-the-fly leakage current detection circuit that detects leakage current as part of another operation, such as a memory operation.

Abstract: Techniques and circuitry are presented for more rapidly and accurately obtaining a temperature code (TCO) on an integrated circuit. A comparison voltage is ramped up and two counts are determined concurrently, a first count on how many clock cycles for the comparison voltage to ramp up from a low reference voltage to a proportional to absolute temperature (PTAT) and a second count for the number of clock cycles for the comparison voltage to go from the low reference voltage to a high reference voltage. The TCO value is then obtained by using the second count in a post-processing calibration to adjust the first count. An initial calibration can also be included when the circuit is powered up.

Abstract: Methods for controlling a ramp rate of an output voltage derived from one or more charge pumps and reducing variation in the ramp rate due to process, voltage, and temperature (PVT) variations are described. In some embodiments, the ramp rate of the output voltage from one or more charge pumps may be controlled using a ramp rate control circuit that uses a digital counter to adjust (or step up) the output voltage from the one or more charge pumps based on a ramp rate schedule. The ramp rate schedule may specify varying output voltage levels for the one or more charge pumps during a time period in which the output voltage charges up from a first voltage to a second voltage greater than the first voltage.

Abstract: A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.

Abstract: To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.

Abstract: A charge pump is regulated based up its output level. The regulation circuitry adjusts the frequency of the pump's clock based on feedback from pump's output. The pump's clock signal is generated by an oscillator whose frequency depends on a reference voltage level. The reference voltage level is dependent upon a regulation signal. In an example, a transistor whose gate is controlled by the regulation level is part of a series of elements in voltage divider, where the reference value is taken from a node of the divider.

Abstract: To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.

Abstract: A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.

Abstract: Methods for controlling a ramp rate of an output voltage derived from one or more charge pumps and reducing variation in the ramp rate due to process, voltage, and temperature (PVT) variations are described. In some embodiments, the ramp rate of the output voltage from one or more charge pumps may be controlled using a ramp rate control circuit that uses a digital counter to adjust (or step up) the output voltage from the one or more charge pumps based on a ramp rate schedule. The ramp rate schedule may specify varying output voltage levels for the one or more charge pumps during a time period in which the output voltage charges up from a first voltage to a second voltage greater than the first voltage.

Abstract: A charge pump is regulated based up its output level. The regulation circuitry adjusts the frequency of the pump's clock based on feedback from pump's output. The pump's clock signal is generated by an oscillator whose frequency depends on a reference voltage level. The reference voltage level is dependent upon a regulation signal. In an example, a transistor whose gate is controlled by the regulation level is part of a series of elements in voltage divider, where the reference value is taken from a node of the divider.

Abstract: In the present method of measuring the current of a first current source, the current thereof may be combined with either the current of a second current source, or the current of a third current source. Based on a combination of the current of the first current source and either (a) the current of the second current source or (b) the current of the third current source, a digital output is provided. If this digital output is of a first value, the state of combining the current of the first current source with the current of the second current source becomes in effect. If this digital output is of a second value, the state of combining the current of the first current source with the current of the second current source becomes in effect.

Abstract: A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.

Abstract: A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.