Patents by Inventor Steve Clauter

Steve Clauter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9759763
    Abstract: A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: September 12, 2017
    Assignee: Integrated Technology Corporation
    Inventors: Rodney E. Schwartz, Steve Clauter, David Lohr, Gary Rogers, James Baggiore
  • Publication number: 20130027067
    Abstract: A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 31, 2013
    Applicant: INTEGRATED TECHNOLOGY CORPORATION
    Inventors: Rodney E. Schwartz, Steve Clauter, David Lohr, Gary Rogers, James Baggiore
  • Publication number: 20110309847
    Abstract: A method and circuit is provided for implementing high current capability Kelvin connections and measuring the resistance of the contacts and connections to verify that the conducting path is capable of carrying the high current without damage or degraded performance. Included as well is the means and circuit for efficiently dividing a high current test stimulus current into 2 or more paths with low losses and voltage drops.
    Type: Application
    Filed: April 20, 2011
    Publication date: December 22, 2011
    Inventors: Rodney Schwartz, Gary Rogers, Steve Clauter
  • Patent number: 7521947
    Abstract: A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: April 21, 2009
    Assignee: Integrated Technology Corporation
    Inventors: Gary Rogers, Steve Clauter, Rodney Schwartz, Taichi Ukai, Joe Lambright, Dave Lohr
  • Publication number: 20080290882
    Abstract: A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level.
    Type: Application
    Filed: May 23, 2007
    Publication date: November 27, 2008
    Applicant: INTEGRATED TECHNOLOGY CORPORATION
    Inventors: Gary Rogers, Steve Clauter, Rodney Schwartz, Taichi Ukai, Joe Lambright, Dave Lohr