Patents by Inventor Steve Droes

Steve Droes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Active silicon device on a cleaved silicon-on-insulator substrate
    Patent number: 7659582
    Abstract: A system and method for hydrogen (H) exfoliation are provided for attaching silicon-on-insulator (SOI) fabricated circuits to carrier substrates. The method comprises: providing a SOI substrate, including a silicon (Si) active layer and buried oxide (BOX) layer overlying a Si substrate; forming a circuit in the Si active layer; forming a blocking mask over selected circuit areas; implanting H in the Si substrate; annealing; removing the blocking mask; in response to the H implanting, forming a cleaving plane in the Si substrate; bonding the circuit the top oxide layer to the carrier substrate; and, cleaving the Si substrate. More specifically, the cleaving plane is formed along a horizontal peak concentration (Rp) H layer in the Si substrate and along the buried oxide layer interface.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: February 9, 2010
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Steve Droes, Masao Moriguchi, Yutaka Takafuji
  • Active silicon device on a cleaved silicon-on-insulator substrate
    Publication number: 20070122998
    Abstract: A system and method for hydrogen (H) exfoliation are provided for attaching silicon-on-insulator (SOI) fabricated circuits to carrier substrates. The method comprises: providing a SOI substrate, including a silicon (Si) active layer and buried oxide (BOX) layer overlying a Si substrate; forming a circuit in the Si active layer; forming a blocking mask over selected circuit areas; implanting H in the Si substrate; annealing; removing the blocking mask; in response to the H implanting, forming a cleaving plane in the Si substrate; bonding the circuit the top oxide layer to the carrier substrate; and, cleaving the Si substrate. More specifically, the cleaving plane is formed along a horizontal peak concentration (Rp) H layer in the Si substrate and along the buried oxide layer interface.
    Type: Application
    Filed: January 26, 2007
    Publication date: May 31, 2007
    Inventors: Steve Droes, Masao Moriguchi, Yutaka Takafuji
  • System and method for hydrogen exfoliation
    Patent number: 7179719
    Abstract: A system and method for hydrogen (H) exfoliation are provided for attaching silicon-on-insulator (SOI) fabricated circuits to carrier substrates. The method comprises: providing a SOI substrate, including a silicon (Si) active layer and buried oxide (BOX) layer overlying a Si substrate; forming a circuit in the Si active layer; forming a blocking mask over selected circuit areas; implanting H in the Si substrate; annealing; removing the blocking mask; in response to the H implanting, forming a cleaving plane in the Si substrate; bonding the circuit the top oxide layer to the carrier substrate; and, cleaving the Si substrate. More specifically, the cleaving plane is formed along a horizontal peak concentration (Rp) H layer in the Si substrate and along the buried oxide layer interface.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: February 20, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Steve Droes, Masao Moriguchi, Yutaka Takafuji
  • System and method for hydrogen exfoliation
    Publication number: 20060068565
    Abstract: A system and method for hydrogen (H) exfoliation are provided for attaching silicon-on-insulator (SOI) fabricated circuits to carrier substrates. The method comprises: providing a SOI substrate, including a silicon (Si) active layer and buried oxide (BOX) layer overlying a Si substrate; forming a circuit in the Si active layer; forming a blocking mask over selected circuit areas; implanting H in the Si substrate; annealing; removing the blocking mask; in response to the H implanting, forming a cleaving plane in the Si substrate; bonding the circuit the top oxide layer to the carrier substrate; and, cleaving the Si substrate. More specifically, the cleaving plane is formed along a horizontal peak concentration (Rp) H layer in the Si substrate and along the buried oxide layer interface.
    Type: Application
    Filed: September 28, 2004
    Publication date: March 30, 2006
    Inventors: Steve Droes, Masao Moriguchi, Yutaka Takafuji