Patents by Inventor Steve E. Lass

Steve E. Lass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6817005
    Abstract: In modular design flow, logic designers are able to partition a top-level logic design for a PLD into modules and implement any module independently from other modules. Modules are mapped, placed, and routed using selected information derived at the time the top-level logic design is partitioned. Finally, the modules are integrated into the top-level logic design using a guided process. Specifically, the information generated during the partitioning of the top-level design and the implementation of each module is used to guide the implementation of the associated logic in the top-level design. In this manner, the implementation of all modules can proceed in any order or in parallel and the integration of the modules into the top-level design can be done quickly and in any order.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: November 9, 2004
    Assignee: Xilinx, Inc.
    Inventors: Jeffrey M. Mason, Steve E. Lass, Bruce E. Talley, David W. Bennett
  • Publication number: 20010047509
    Abstract: In modular design flow, logic designers are able to partition a top-level logic design for a PLD into modules and implement any module independently from other modules. Modules are mapped, placed, and routed using selected information derived at the time the top-level logic design is partitioned. Finally, the modules are integrated into the top-level logic design using a guided process. Specifically, the information generated during the partitioning of the top-level design and the implementation of each module is used to guide the implementation of the associated logic in the top-level design. In this manner, the implementation of all modules can proceed in any order or in parallel and the integration of the modules into the top-level design can be done quickly and in any order.
    Type: Application
    Filed: April 20, 2001
    Publication date: November 29, 2001
    Inventors: Jeffrey M. Mason, Steve E. Lass, Bruce E. Talley, David W. Bennett