Abstract: A method and system for determining a body impedance (Zbody) of a user are disclosed. The method comprises coupling a sensor device to the user, wherein the sensor device includes at least a first and a second electrode. The method includes applying a voltage signal (Vin) through a first impedance (Zin1) to the first electrode and through a second impedance (Zin2) to the second electrode to produce an output signal. The method includes measuring a differential voltage (Vbody) across the first and second electrodes and calculating the body impedance (Zbody) using the measured differential voltage (Vbody), the voltage signal (Vin), the first impedance (Zin1), and the second impedance (Zin2).

Abstract: Detecting a word line leakage in a non-volatile memory array. Various methods include: in a first step, enabling a M-bit “coarse” digital-to-analog converter (DAC) logic of an N-bit analog-to-digital converter (ADC) to, according to a clock signal of the coarse DAC, compare a reference voltage and a biased input voltage of a load current of the memory array, wherein the reference voltage is dependent upon the voltage level at which the input voltage becomes non-linear, and, in a second step, if the input voltage is greater than or equal to the reference voltage, enabling a P-bit “fine” ramp digital-to-analog converter (DAC) logic of the ADC to enable drawing a second current from the load current to ramp down the input voltage and to begin a counter and conduct leakage detection with the ADC when the input voltage is in the range between a first voltage and a second voltage.

Abstract: A method and system for determining thermistor resistance have been disclosed. The method comprises providing a temperature sensor network within a wireless sensor device, wherein the temperature sensor network includes a driver device and a receiver device, coupling the driver device to the receiver device using a dual bond wire system, determining at least one output voltage using at least one input current flowing through the dual bond wire system, and determining the thermistor resistance using the at least one output voltage. The system comprises a wireless sensor device including a temperature sensor network that comprises driver and receiver devices, and a dual bond wire system that couples the driver device to the receiver device, wherein at least one output voltage is determined using at least one input current flowing through the dual bond wire system, further wherein the thermistor resistance is determined using the at least one output voltage.

Abstract: A method and system for determining a body impedance (Zbody) of a user are disclosed. The method comprises coupling a sensor device to the user, wherein the sensor device includes at least a first and a second electrode. The method includes applying a voltage signal (Vin) through a first impedance (Zin1) to the first electrode and through a second impedance (Zin2) to the second electrode to produce an output signal. The method includes measuring a differential voltage (Vbody) across the first and second electrodes and calculating the body impedance (Zbody) using the measured differential voltage (Vbody), the voltage signal (Vin), the first impedance (Zin1), and the second impedance (Zin2).

Abstract: A method and system for determining thermistor resistance have been disclosed. The method comprises providing a temperature sensor network within a wireless sensor device, wherein the temperature sensor network includes a driver device and a receiver device, coupling the driver device to the receiver device using a dual bond wire system, determining at least one output voltage using at least one input current flowing through the dual bond wire system, and determining the thermistor resistance using the at least one output voltage. The system comprises a wireless sensor device including a temperature sensor network that comprises driver and receiver devices, and a dual bond wire system that couples the driver device to the receiver device, wherein at least one output voltage is determined using at least one input current flowing through the dual bond wire system, further wherein the thermistor resistance is determined using the at least one output voltage.

Abstract: A circuit including an amplifier, a transistor, and first, second and third resistances. The amplifier includes an input and an output. The amplifier receives an input signal. A cycle of the input signal includes first and second pulses. The input signal is asymmetrical such that the first pulse has a different peak magnitude than the second pulse. The transistor is connected to the input and the output. The first, second, and third resistances are each connected to the input of the amplifier. The second resistance receives a first input voltage. The third resistance receives a second input voltage. The input signal is based on the first resistance and the first and second input voltages. The amplifier corrects some asymmetry of the input signal to provide an output signal. An amount of asymmetry of the output signal is based on (i) the input signal, and (ii) a state of the transistor.

Abstract: A circuit including an amplifier, a transistor, and first, second and third resistances. The amplifier includes an input and an output. The amplifier receives an input signal. A cycle of the input signal includes first and second pulses. The input signal is asymmetrical such that the first pulse has a different peak magnitude than the second pulse. The transistor is connected to the input and the output. The first, second, and third resistances are each connected to the input of the amplifier. The second resistance receives a first input voltage. The third resistance receives a second input voltage. The input signal is based on the first resistance and the first and second input voltages. The amplifier corrects some asymmetry of the input signal to provide an output signal. An amount of asymmetry of the output signal is based on (i) the input signal, and (ii) a state of the transistor.

Abstract: In one embodiment, an apparatus an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier, the input node receiving the asymmetric signal. A second resistance is coupled to the input node of the amplifier. The second resistance includes a linear resistor. A third resistance is coupled to the second resistance. The third resistance is varied to adjust an amount of asymmetric correction provided by the amplifier to correct the asymmetric signal at the output node. The amount of asymmetric correction is a function of the first resistance and a combination of the second resistance and the third resistance.

Abstract: In one embodiment, an apparatus an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier, the input node receiving the asymmetric signal. A second resistance is coupled to the input node of the amplifier. The second resistance includes a linear resistor. A third resistance is coupled to the second resistance. The third resistance is varied to adjust an amount of asymmetric correction provided by the amplifier to correct the asymmetric signal at the output node. The amount of asymmetric correction is a function of the first resistance and a combination of the second resistance and the third resistance.

Abstract: A frequency phase locked loop (FPLL) includes a first feedback loop coupled to a second feedback loop. The first feedback loop is configured to correct a phase offset of an output signal of the FPLL. The second feedback loop is configured to correct a frequency offset of the output signal of the FPLL.