Abstract: This disclosure describes systems, methods, and devices related to testing an integrated circuit for defects. A method may include applying a nominal voltage to the integrated circuit for a first time period; applying a dynamic voltage greater than the nominal voltage to the integrated circuit for a second time period after the first time period; applying a static voltage greater than the dynamic voltage to the integrated circuit for a third time period after the second time period, wherein the static voltage is a target static voltage less than a target voltage; and applying the dynamic voltage to the integrated circuit during a fourth time period after the third time period.