Patents by Inventor Steve J. Strauch

Steve J. Strauch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10600667
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: March 24, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Publication number: 20190279892
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 12, 2019
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Patent number: 10347519
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the water based on the comparison.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: July 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Publication number: 20190148202
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Application
    Filed: January 15, 2019
    Publication date: May 16, 2019
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Patent number: 10242901
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: March 26, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Publication number: 20180330976
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 15, 2018
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Patent number: 10062595
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: August 28, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Publication number: 20170352563
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Application
    Filed: July 24, 2017
    Publication date: December 7, 2017
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch
  • Patent number: 9748128
    Abstract: Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: August 29, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Yang Chao, Keith E. Ypma, Steve J. Strauch