Abstract: This disclosure presents various means for securing a tracking beacon to personal protection equipment. The tracking beacon mount is constructed of a cover, a base, a transmitter and a mounting mechanism, such as a strap. The transmitter has a unique identifier which is detected by a proximity sensor. The proximity sensor is operably connected to a tracking system which can be used to detect the presence of the beacons. The system is programmed to recognize the types of items used and warn the user if something predetermined as required for the location or job type is missing.

Abstract: This disclosure presents various means for securing a tracking beacon to personal protection equipment. The tracking beacon mount is constructed of a cover, a base, a transmitter and a mounting mechanism, such as a strap. The transmitter has a unique identifier which is detected by a proximity sensor. The proximity sensor is operably connected to a tracking system which can be used to detect the presence of the beacons. The system is programmed to recognize the types of items used and warn the user if something predetermined as required for the location or job type is missing.

Abstract: An asset tracking system includes a series of sensors placed on a tool storage system connected to a computerized system. The sensor mounts are placed so that sensor can detect the presence or absence of the tool assigned to the spot. In some examples, these sensors are pressure sensors calibrated to detect the weight of the tool upon the tool mount. The system can remotely notify a user of the status of the tools through either a display or a telecommunications system. The system can also be configured in some examples to check tools out to a specific user via the computerized system.

Abstract: An Algorithmic Reactive Testbench (ART) system is provided for the simulation/verification of an analog integrated circuit design. The ART system is a high level simulation/verification environment with a user program in which one or more analog testbenches are instantiated and operated as prescribed in an algorithmic reactive testbench program, and the properties of the unit testbenches (test objects) can be influenced by prior analysis of themselves or other tests. The test object may also contain various properties including information reflecting the status of the test object. The modification of a property of a test object is an act of communication in the ART system from the algorithmic reactive testbench program to the test object.

Abstract: An Algorithmic Reactive Testbench (ART) system is provided. The ART system is a high level verification environment with a user program in which on or more analog testbenches are instantiated and operated as prescribed in the program algorithm, and the properties of the unit testbenches (test objects) can be influenced by prior analysis of themselves or other tests. The results of the analysis may also affect the flow of the program itself. In the ART system, modification of the properties of a unit testbench occurs separately in the user program after definition of the unit testbench in the program (test object). A test object is a representation of a unit testbench along with its complete simulation setup and all associated data for the simulation. The test object may also contain various properties including information reflecting the status of the test object. The modification of a property of a test object is an act of communication in the ART system from the ART program to the test object.

Abstract: A switching buck regulator circuit includes an n-type high-side switch. The driver of the high-side switch employs a boot voltage (Vcboot) as a power supply. Also, the output current is mirrored to a sense branch. A current sense voltage is generated employing a transistor in the sense branch. The current sense voltage is compared to a reference voltage that is generated employing another transistor having a gate that is coupled to the gate of the sense branch transistor. A diode (Dp) is coupled between the gate of the sense branch transistor and the input voltage (Vin). Another diode (Dc) is coupled between the gate of the sense branch transistor and Vcboot. When the high-side switch is off, the current sense voltage is clamped to substantially Vin?VDp?VTN2. When the high-side switch is on, the gate voltage of the high-side switch is substantially given by Vcboot?VDc.

Abstract: A biasing circuit is arranged to provide relatively well controlled startup and steady state behavior for a reference circuit such as noise immunity and reduced dependence on supplies. The biasing circuit initially employs an independent bias current for biasing the reference circuit at startup until a large enough bootstrapped (output voltage referenced) bias current can be generated that can take over the subsequent biasing of the circuit in the steady state. In one embodiment, a Power On Reset (POR) signal can be generated during the transition from an initial biasing of the reference circuit by the independent bias current to a subsequent steady state biasing provided by the bootstrapped bias current. Also, the assertion of the POR signal can be employed to turn off the transistors providing the independent bias current.

Abstract: A bidirectional current control circuit suitable for use in controlling the charging and discharging of rechargeable battery cells includes two serially connected metal oxide semiconductor field effect transistors (MOSFETs) with respective body diodes, a resistor which is connected in series with the MOSFETs and develops a voltage based upon the current through such MOSFETs, and a control circuit. The control circuit monitors the voltage across the resistor and selectively switches the MOSFETs on or off individually. As long as the current through the MOSFETs is less than a maximum positive current and more than a minimum negative current, both MOSFETs are maintained in their respective on states. When the negative current becomes less than a minimum negative current, the first MOSFET is turned off while the second MOSFET is turned on, and when the positive current becomes greater than a maximum positive current, the second MOSFET is turned off while the first MOSFET is turned on.