Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for agricultural data intelligence. Data from multiple subscribers (growers and marketers) are aggregated to provide market intelligence to the subscribers. Data and insights are presented in a dashboard format that is intuitive and facilitates ease of use. To prevent data leakage, data anonymization and aggregation processes are implemented.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for agricultural data intelligence. Data from multiple subscribers (growers and marketers) are aggregated to provide market intelligence to the subscribers. Data and insights are presented in a dashboard format that is intuitive and facilitates ease of use. To prevent data leakage, data anonymization and aggregation processes are implemented.

Abstract: A central fill facility, drug dispensing system and method are provided in order to efficiently and accurately dispense a plurality of different drugs. The drug dispensing system includes a storage system configured to store a plurality of different drugs including a co-located inventory of a respective drug having both a first portion of the inventory of the respective drug to be dispensed pursuant to a predefined program and a second portion of the inventory of the respective drug that is not to be dispensed pursuant to the predefined program. The drug dispensing system also includes the dispensing station and dispensing control circuitry. The dispensing control circuitry is configured to control the dispensing station such that the first portion of the respective predefined program eligible drug is dispensed prior to dispensing the second portion of the respective predefined program ineligible drug.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for agricultural data intelligence. Data from multiple subscribers (growers and marketers) are aggregated to provide market intelligence to the subscribers. Data and insights are presented in a dashboard format that is intuitive and facilitates ease of use. To prevent data leakage, data anonymization and aggregation processes are implemented.

Abstract: Providing for a memory device having a resistive switching memory integrated within backend layers of the memory device is described herein. By way of example, the resistive switching memory can be embedded memory such as cache, random access memory, or the like, in various embodiments. The resistive memory can be fabricated between various backend metallization schemes, including backend copper metal layers and in part utilizing one or more damascene processes. In some embodiments, the resistive memory can be fabricated in part with damascene processes and in part with subtractive etch processing, utilizing four or fewer photo-resist masks. Accordingly, the disclosure provides a relatively low cost, high performance embedded memory compatible with a variety of fabrication processes of integrated circuit foundries.

Abstract: A memory cell that includes a first metal layer formed over a substrate is provided. The substrate includes one or more complementary metal-oxide semiconductor devices. The memory cell also includes a via device that connects at least a portion of the first metal layer and at least another portion of a second metal layer. The first metal layer has a first thickness having an edge thereof that serves as an electrode for a memory cell formed by the via device. The memory cell scales as a function of the first thickness and at least in part independent of a minimum feature size of the memory device.

Abstract: Provided is a monolithic integration of resistive memory with complementary metal oxide semiconductor using integrated circuit foundry processes. A memory device is provided that includes a substrate comprising one or more complementary metal-oxide semiconductor devices, a first insulator layer formed on the substrate; and a monolithic stack. The monolithic stack includes multiple layers fabricated as part of a monolithic process over the first insulator layer. The multiple layers include a first metal layer, a second insulator layer, and a second metal layer. A resistive memory device structure is formed within the second insulator layer and within a thermal budget of the one or more complementary metal-oxide semiconductor devices. The resistive memory device structure is implemented as a pillar device or as a via device. Further, the first metal layer is coupled to the second metal layer.

Abstract: A central fill facility, drug dispensing system and method are provided in order to efficiently and accurately dispense a plurality of different drugs. The drug dispensing system includes a storage system configured to store a plurality of different drugs including a co-located inventory of a respective drug having both a first portion of the inventory of the respective drug to be dispensed pursuant to a predefined program and a second portion of the inventory of the respective drug that is not to be dispensed pursuant to the predefined program. The drug dispensing system also includes the dispensing station and dispensing control circuitry. The dispensing control circuitry is configured to control the dispensing station such that the first portion of the respective predefined program eligible drug is dispensed prior to dispensing the second portion of the respective predefined program ineligible drug.

Abstract: Provided is a monolithic integration of resistive memory with complementary metal oxide semiconductor using integrated circuit foundry processes. A memory device is provided that includes a substrate comprising one or more complementary metal-oxide semiconductor devices, a first insulator layer formed on the substrate; and a monolithic stack. The monolithic stack includes multiple layers fabricated as part of a monolithic process over the first insulator layer. The multiple layers include a first metal layer, a second insulator layer, and a second metal layer. A resistive memory device structure is formed within the second insulator layer and within a thermal budget of the one or more complementary metal-oxide semiconductor devices. The resistive memory device structure is implemented as a pillar device or as a via device. Further, the first metal layer is coupled to the second metal layer.

Abstract: Providing for two-terminal memory cell structures and fabrication that can be achieved with a relatively low temperature process(es) is described herein. By way of example, disclosed two-terminal memory cells can be formed at least in part as a continuous deposition, potentially yielding improved efficiency in manufacturing. Furthermore, various embodiments can be compatible with some existing complementary metal oxide semiconductor fabrication processes, reducing or avoiding retooling overhead that might be associated with modifying existing fabrication processes in favor of other two-terminal memory cell fabrication techniques.

Abstract: Providing for a memory device having a resistive switching memory integrated within backend layers of the memory device is described herein. By way of example, the resistive switching memory can be embedded memory such as cache, random access memory, or the like, in various embodiments. The resistive memory can be fabricated between various backend metallization schemes, including backend copper metal layers and in part utilizing one or more damascene processes. In some embodiments, the resistive memory can be fabricated in part with damascene processes and in part with subtractive etch processing, utilizing four or fewer photo-resist masks. Accordingly, the disclosure provides a relatively low cost, high performance embedded memory compatible with a variety of fabrication processes of integrated circuit foundries.

Abstract: Provided is a monolithic integration of resistive memory with complementary metal oxide semiconductor using integrated circuit foundry processes. A memory device is provided that includes a substrate comprising one or more complementary metal-oxide semiconductor devices, a first insulator layer formed on the substrate; and a monolithic stack. The monolithic stack includes multiple layers fabricated as part of a monolithic process over the first insulator layer. The multiple layers include a first metal layer, a second insulator layer, and a second metal layer. A resistive memory device structure is formed within the second insulator layer and within a thermal budget of the one or more complementary metal-oxide semiconductor devices. The resistive memory device structure is implemented as a pillar device or as a via device. Further, the first metal layer is coupled to the second metal layer.

Abstract: A memory cell that includes a first metal layer formed over a substrate is provided. The substrate includes one or more complementary metal-oxide semiconductor devices. The memory cell also includes a via device that connects at least a portion of the first metal layer and at least another portion of a second metal layer. The first metal layer has a first thickness having an edge thereof that serves as an electrode for a memory cell formed by the via device. The memory cell scales as a function of the first thickness and at least in part independent of a minimum feature size of the memory device.

Abstract: Disclosed herein is a biodegradable container designed for holding produce items. Specifically exemplified is a biodegradable container that includes a top portion and a bottom portion. The top portion has an image of produce provided thereon. The bottom portion has an image of a basket provided thereon. The top portion also defines a window for the customer to view the produce product disposed within the container. The window has a biodegradable film which covers the window.