Abstract: An embodiment of an apparatus for performing sequential analog/digital conversion and multiplication generates upon completing the conversion a digital output indicative of an analog input and a digital product equivalent to the product formed by multiplying a digital operand with the digital output indicative of the input. The apparatus is configured to exploit parallelism per conversion iteration such that the time per iteration can be substantially determined by the conversion processing. During each iteration, a converter processes the analog input to determine the manner in which to refine the digital output while a multiplier combines the operand with a previous partial result to generate a speculative partial result and a weighted previous partial result. According to the determination, the converter refines the digital output while the multiplier selects as a partial result output the speculative partial result or the weighted previous partial result. Additional embodiments are shown and described.