Abstract: There is disclosed a method and apparatus for secure watermarking of print jobs using a smartcard. The method includes receiving, from a user, a request to print a document with a secured watermark and obtaining authorization data from a smartcard provided by the user. The method further includes receiving, from the user, a pin associated with the smartcard and obtaining authorization to print with a secured watermark from an authorization server based on the authorization data and the user pin. The method further includes obtaining a listing of secured watermarks available on a multifunction peripheral, receiving, from the user, a selection of a selected secured watermark from the listing of secured watermarks, and transmitting a print request to the multifunction peripheral, the print request including a secured watermark instruction and authorization to use the selected secured watermark.

Abstract: Buffers, or registers, are used at one or more places between processing stages in a device for decrypting a data stream. The device has multiple processing stages arranged in a circular manner so that data is repeatedly passed from a prior stage to a next stage, and from a last stage back to a first stage, until processing is completed. The use of one or more registers at one or more positions allows data to be stored so that the stream associated with the stored data can effectively be suspended. This allows data from another stream to be processed while the suspended stream is in a wait state.

Abstract: A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch.

Abstract: A system and method for fast data transfers in an electronic network comprises a data transfer engine configured to independently execute data transfer instructions and a processor configured to forward the data transfer instructions to the data transfer engine. The data transfer engine preferably executes the data transfer instructions while the processor proceeds to execute a next instruction. The data transfer engine includes a transmit engine that executes transmit transfer instructions and a receive engine that executes receive transfer instructions. The transmit engine and the receive engine operate independently and thus may operate concurrently.

Abstract: A system and method for context switching in an electronic network comprises a memory configured to store instruction modules, each instruction module corresponding to a context, a processor that executes the instruction modules, and a control state machine. The control state machine selects one of the instruction modules for execution by the processor according to context information from the electronic network. The control state machine includes a switch address generator, a return address register, and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address register stores a return address, which is an address of a next consecutive instruction, when an instruction module is interrupted for a context switch.

Abstract: Buffers, or registers, are used at one or more places between processing stages in a device for decrypting a data stream. The device has multiple processing stages arranged in a circular manner so that data is repeatedly passed from a prior stage to a next stage, and from a last stage back to a first stage, until processing is completed. The use of one or more registers at one or more positions allows data to be stored so that the stream associated with the stored data can effectively be suspended. This allows data from another stream to be processed while the suspended stream is in a wait state.

Abstract: A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch.