Abstract: When applied to geographical locale datasets, cluster characterization and comparison techniques meaningfully transform representations of data to facilitate sophisticated locale-specific comparisons and provide location-specific outcome predictions. Outcome predictions may, for example, be based on distributions of locale attributes associated with of a large number of geographic locales and/or by computing statistical probabilities of particular outcomes based on outcome data associated with each of the geographic locales.

Abstract: The disclosed technology facilitates objective comparisons between different geographical locales based on statistical comparisons of associated distributions of locale attributes. According to one implementation, a method disclosed herein includes defining a benchmark cluster having a first distribution of locale attributes; identifying a plurality of locale clusters that each correspond to one of a number of locales within a search zone associated with a different distribution of the locale attributes; assessing satisfaction of a similarity condition by comparing the benchmark cluster and to one or more of the identified locale clusters; and outputting one or more of the locales corresponding to the identified locale clusters satisfying the similarity condition.

Abstract: A synchronized boot process for an In-Circuit Emulator system. A real microcontroller is operated in lock-step synchronization with a virtual microcontroller to permit In-Circuit Emulation that allows debugging of the real microcontroller without interfering with its real time operation. The synchronized boot is accomplished by running boot code in the real microcontroller while the virtual microcontroller runs dummy code with the same timing as the boot code. Registers and memory contents are then copied from the real microcontroller to the virtual microcontroller to complete initialization and enter a state of readiness for lock-step operation.

Abstract: A breakpoint control mechanism for an In-Circuit Emulation system. Break bits are assigned to each instruction address and stored in a lookup table within a base station containing a virtual microcontroller. As a program counter increments, a determination is made as to whether or not a break is to occur by reading the break bit from the lookup table. When a break is to occur, a breakpoint controller issues a break command over an interface to an actual microcontroller under test, thus freeing the microcontroller under test from having to include a look-up table on board for a breakpoint control or otherwise provide specifically for breakpoint control.

Abstract: A device for monitoring events. The device may have a programmable event engine for detecting events and a memory array coupled to the event engine. The array may store data for programming the event engine to monitor for the events. The device may have an external pin coupled to the event engine. The event engine may monitor a signal on the external pin to detect events external to the device. Alternatively, the device may output a signal on an external pin in response to detecting one of the events.

Abstract: A halt control gatekeeper for an In-Circuit Emulation system. Halt commands are implemented through a gatekeeper forming a portion of a virtual microcontroller that operates in lock-step synchronization with a real microcontroller under test. When a halt command is received, the gatekeeper determines if the microcontroller is in a sleep mode and, if so, appropriately notifies a host computer and queues up a halt command. If the microcontroller is not in a sleep mode, the gatekeeper simply queues a halt command and notifies the host computer when the microcontroller has halted and it is safe to perform debug operations on the virtual microcontroller.

Abstract: An event architecture. The event architecture may have a number of event engines for monitoring conditions and also chain logic coupled to the event engines. The event architecture may further have a memory array for storing data to configure the chain logic to configure an execution scheme of the event engines. The chain logic may be re-configured by additional data from the memory to re-configure the execution scheme of the event engines.

Abstract: Embodiments of the present invention effectuate a method and system for debugging a device such as a microcontroller in a distributed architectural scheme, where the device may operate at speeds much faster than the debugger program is run, with limited debugging resources physically incorporated into the device itself, and with relatively limited computational capacity, vis-à-vis the platform deploying the debugging software. The embodiments place relatively modest, uncomplicated demands on the debugger software, and the ICE may also be relatively simple. Further, debugging methods and systems according to these embodiments are flexible and adaptable to a variety of different devices that must undergo debugging, yet remain effective, simple, and inexpensive.

Abstract: A watchdog timer control using a gatekeeper in an In-Circuit Emulation system. The In-Circuit Emulation system has a microcontroller operating in lock-step synchronization with a virtual microcontroller. When a watchdog event occurs, the gatekeeper, forming a part of the virtual microcontroller, crowbars the reset line of the virtual microcontroller as well as the real microcontroller. This freezes the state of the virtual microcontroller so that debug operations can be carried out. The gatekeeper operates with its own gatekeeper clock independent of the microcontroller clock. When a watchdog event occurs, the gatekeeper clock is rerouted to the virtual microcontroller to facilitate debug operations of the virtual microcontroller.

Abstract: Communications between a device and a debugging system are effectuated by programming an ICE with a first logic set, which enables the ICE to establish communications with the device and determine a unique identifier thereof. The ICE communicates the device's unique identifier back to a host computer. The host computer matches the unique identifier to a second logic set and a plug-in module. The host computer then programs the ICE with the second logic set and activates the plug-in module. The second logic set allow the ICE and the device to execute program instructions downloaded with the second logic set in lock-step fashion. The plug-in module allows the host computer to interact in the debugging process as necessary. This achieves flexibility, because any ICE may be programmed to communicate with any device.

Abstract: A combined in-circuit emulation system and device programmer. A pod assembly used in an in-circuit emulation system has both a real microcontroller used in the In-Circuit Emulation and debugging process as well as a socket that accommodates a microcontroller to be programmed (a program microcontroller). Programming can be carried out over a single interface that is shared between the microcontroller and the program microcontroller and which is also used to provide communication between the real microcontroller and the In-Circuit Emulation system to carry out emulation functions. In order to assure that the emulation microcontroller does not interfere with the programming process for a microcontroller placed in a programming socket, a special sleep mode is implemented in the emulation microcontroller. This sleep mode is activated by a process that takes place at power on in which the a reset line is released with a specified data line held in a logic high state.

Abstract: A method to facilitate programming a microcontroller is disclosed. In one embodiment, after a user configures the circuit by selecting circuit parameters and pin-outs, various items are automatically generated to facilitate programming the microcontroller. The generated items may include: application programming interfaces (APIs) for programming the operation of one or more user modules; source code for realizing the user modules in hardware; interrupt vectors to call interrupt service routines for one or more modules; and a data sheet for the circuit.

Abstract: A power management system and circuit comprising instructions stored in computer memory for the prevention of simultaneous coupling of more than one power source to a device under test (DUT). Instructions stored in memory prevent the simultaneous application of power to the DUT from both the in circuit emulator power grid and an external power source. External power applied to the DUT results in at least one activity signal detected by the computer. If no activity signal appears, a fault condition in the DUT is interpreted. If an activity signal is detected, testing continues under control of Debug Software.

Abstract: A re-configurable combinational logic device. The device comprises combinational logic that inputs a number of signals and a memory array for storing data to define Boolean expressions for a number of states. The states have Boolean expressions of selected signals of the signals input to the combinational logic. The combinational logic is configurable, in response to the data, to select the signals as operands for said Boolean expression and to output a signal that is the result of the Boolean expression. The combinational logic is re-configurable, in response to further data from the memory array, to output a signal that is the result of additional Boolean expressions.

Abstract: A method to program a microcontroller using a software program. First a user selects a module from a catalog of available modules. The module may be for implementing an amplifier, timer, pulse width modulator, etc. This causes information related to the selected module to be displayed. For example, a schematic and data sheet for the selected module may be displayed. Next, the user requests a position and places the selected module in a graphical user interface, which represents the resources available to implement the available modules. For example, the resources may be programmable system blocks. Additional user modules may then be selected and placed. The user then configures the circuit by selecting circuit parameters for the user modules (e.g., amplifier gain), pin configurations, and interconnections between programmable system blocks. The user may then edit source code used to cause the user modules to perform their functions.

Abstract: A method to facilitate circuit design. First, a schematic and data sheet for a selected module may be displayed. Next, in response to a request for a position for the module among available resources (e.g., programmable system blocks), a potential position for the module is computed. The position is displayed on a graphical user interface by mapping the module to one or more programmable system blocks. Additional user modules may then be selected and placed. After allowing the user to configure the circuit by selecting circuit parameters and pin-outs, various items are automatically generated to facilitate programming the target device. For example, application programming interfaces (APIs) for programming an operation of the modules, source code for realizing the modules in the resources, an interrupt vector table, and a data sheet for the circuit may be automatically generated.

Abstract: A catheter system for localized or semi-localized administration of agents through the wall of a blood vessel is provided. Various catheter system constructions which use at least one expandable occluding device to create an isolated region are provided. Constructions using one catheter and one occlusion device are provided, along with constructions using two catheters and multiple occlusion devices. The catheter system may include a catheter with a variable stiffness along its length. The catheter system may also include a guide wire integrated with an inner catheter. The catheter can infuse the agent into the blood vessel in a pressure regulated manner. Methods for delivery and infusion of the agent within a blood vessel are also provided.

Abstract: A system and method for displaying a customized register name, an associated physical address, and an associated value in a software design tool. The customized register name identifies a user module and a configuration register of the user module. The user module is a circuit design to be realized in a programmable electronic circuit. The customized register name can be automatically generated based on the user module name and the configuration register name. The customized register name can also be modified as a unique identifier by a user. The physical address and value of the configuration register can be automatically updated based on modifications of the user module and/or hardware resources assigned to the user module.

Abstract: A device for executing an event thread. The device has programmable logic for storing data to define a number of states in an event thread to be executed in the event engine. The device also has execution logic coupled to the programmable logic. The execution logic is configurable to execute the current state and re-configurable to execute the next state, in response to data from the programmable logic. In this fashion, the next state may be executed by re-configuring the execution logic. The device also has transition logic coupled to the programmable logic. The transition logic causes the next state in the event thread to be entered by loading new data from the programmable logic. Therefore, the execution logic is re-configurable during execution of the event thread.